Author Info
Name
Affiliation
Papers
NAVEEN KADAYINTI
Dept. of Electrical Engineering, Indian Institute of Technology Dharwad, Karnataka 580011, India
1
Collaborators
Citations 
PageRank 
2
0
0.34
Referers 
Referees 
References 
0
20
6
Title
Citations
PageRank
Year
Measurements of the effect of jitter on the performance of clock retiming circuits for on-chip interconnects.00.342018