Author Info
Name
Affiliation
Papers
MOHIT D. GANERIWALA
Electrical Engineering, Indian Institute of Technology Gandhinagar, Gujarat, India
1
Collaborators
Citations 
PageRank 
2
0
0.34
Referers 
Referees 
References 
0
0
0
Title
Citations
PageRank
Year
Capacitance and Surface Potential Model for III-V Double-Gate FET00.342019