| An FPGA-Based Hybrid Neural Network Accelerator for Embedded Satellite Image Classification | 0 | 0.34 | 2020 |
| Efficiency modeling and exploration of 64-bit ARM compute nodes for exascale. | 1 | 0.37 | 2017 |
| Effectiveness of power strategies for video applications: a practical study | 1 | 0.35 | 2016 |
| HLS based design of a mixed architecture for H.264/AVC CAVLD | 0 | 0.34 | 2015 |
| Power consumption models for the use of dynamic and partial reconfiguration. | 2 | 0.37 | 2014 |
| Energy Analysis of a Real-time Multiprocessor Control of Idle States. | 0 | 0.34 | 2013 |
| Power consumption model for partial and dynamic reconfiguration. | 12 | 0.65 | 2012 |
| Impact of operating points on DVFS power management. | 1 | 0.39 | 2012 |
| A Video Monitoring Application forWireless Sensor Networks using IEEE 802.15.4. | 0 | 0.34 | 2011 |
| Embedded operating systems energy overhead | 2 | 0.38 | 2011 |
| Towards a power and energy efficient use of partial dynamic reconfiguration | 1 | 0.35 | 2011 |
| AADL Extension to Model Classical FPGA and FPGA Embedded within a SoC. | 3 | 0.47 | 2011 |
| Parallelism Level Impact on Energy Consumption in Reconfigurable Devices | 4 | 0.53 | 2011 |
| Implantation d'un décodeur H.264 sur plateforme multiprocesseur avec gestion énergétique | 0 | 0.34 | 2010 |
| Power Consumption Modeling for DVFS Exploitation | 14 | 0.92 | 2010 |
| Uml2.0 Profiles For Embedded Systems And Systems On A Chip (Socs) | 9 | 0.64 | 2009 |
| Uml For Modelling And Performance Estimation Of Embedded Systems | 1 | 0.37 | 2009 |
| Fast prototyping of reconfigurable architectures from a C program | 13 | 0.80 | 2003 |
| An estimation and exploration methodology from system-level specifications: application to FPGAs | 3 | 0.43 | 2003 |
