LMStr: exploring shared hardware controlled scratchpad memory for multicores. | 1 | 0.36 | 2017 |
Accurate statistical performance modeling and validation of out-of-order processors using Monte Carlo methods | 0 | 0.34 | 2014 |
Binary instrumentation support for measuring performance in OpenMP programs | 0 | 0.34 | 2013 |
A statistical performance model of the opteron processor | 4 | 0.43 | 2011 |
Extending the Monte Carlo Processor Modeling Technique: Statistical Performance Models of the Niagara 2 Processor | 3 | 0.70 | 2010 |
Compiler-Directed Functional Unit Shutdown For Microarchitecture Power Optimization | 4 | 0.46 | 2007 |
An Idealistic Neuro-PPM Branch Predictor | 1 | 0.36 | 2007 |
Ultra-Fast CPU Performance Prediction: Extending the Monte Carlo Approach | 8 | 0.89 | 2006 |
Improved Estimation for Software Multiplexing of Performance Counters | 8 | 0.80 | 2005 |