Data-Loop-Free Self-Timed Circuit Verification | 1 | 0.37 | 2018 |
A Framework for Asynchronous Circuit Modeling and Verification in ACL2. | 0 | 0.34 | 2017 |
Formal verification of division and square root implementations, an Oracle report. | 1 | 0.38 | 2016 |
Fourier Series Formalization In Acl2(R) | 0 | 0.34 | 2015 |
Montague Meets Markov: Deep Semantics with Probabilistic Logical Form | 29 | 1.10 | 2013 |