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MINORU SAEKI
Author Info
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Name
Affiliation
Papers
MINORU SAEKI
Mitsubishi Electr Corp, Informat Technol R&D Ctr, Kamakura, Kanagawa 2478501, Japan
12
Collaborators
Citations
PageRank
6
243
14.88
Referers
Referees
References
374
95
98
Search Limit
100
374
Publications (12 rows)
Collaborators (6 rows)
Referers (100 rows)
Referees (95 rows)
Title
Citations
PageRank
Year
Asymmetric Leakage From Multiplier And Collision-Based Single-Shot Side-Channel Attack
0
0.34
2016
Two Operands Of Multipliers In Side-Channel Attack
4
0.42
2015
How To Decide Selection Functions For Power Analysis: From The Viewpoint Of Hardware Architecture Of Block Ciphers
0
0.34
2011
A Design Methodology For A Dpa-Resistant Circuit With Rsl Techniques
2
0.37
2010
A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques
22
0.94
2009
Security Evaluations of MRSL and DRSL Considering Signal Delays
2
0.39
2008
An Analysis of Leakage Factors for Dual-Rail Pre-Charge Logic Style
5
0.46
2008
Leakage Analysis of DPA Countermeasures at the Logic Level
3
0.43
2007
Random Switching Logic: A New Countermeasure against DPA and Second-Order DPA at the Logic Level
39
2.39
2007
Security evaluation of DPA countermeasures using dual-rail pre-charge logic style
83
2.94
2006
DPA leakage models for CMOS logic circuits
29
1.88
2005
Random Switching Logic: A Countermeasure against DPA based on Transition Probability
54
3.98
2004
1