| Generating Layouts of Standard Cells by Implicit Learning on Design Rules for Advanced Processes. | 0 | 0.34 | 2021 |
| AMSER-FF: Area-Minimized Soft-Error-Recoverable Flip-Flop for Radiation Hardening | 0 | 0.34 | 2021 |
| A Delay-Adjustable, Self-Testable Flip-Flop for Soft-Error Tolerability and Delay-Fault Testability | 0 | 0.34 | 2021 |
| DAD-FF: Hardening Designs by Delay-Adjustable D-Flip-Flop for Soft-Error-Rate Reduction | 3 | 0.49 | 2020 |
| Roadrunner: Autonomous Intersection Management with Dynamic Lane Assignment | 0 | 0.34 | 2020 |
| Radiation-Harden RISC Processor for Micro-Satellites in Standard CMOS | 0 | 0.34 | 2020 |
| Safcast: Smart Inter-Datacenter Multicast Transfer With Deadline Guarantee By Store-And-Forwarding | 0 | 0.34 | 2020 |
| Speeding Up Functional Timing Analysis by Concise Formulation of Timed Characteristic Functions | 0 | 0.34 | 2020 |
| SDPTA: Soft-Delay-aware Pattern-based Timing Analysis and Its Path-Fixing Mechanism | 0 | 0.34 | 2020 |
| Dynamic Switch Migration in Distributed Software-Defined Networks to Achieve Controller Load Balance | 8 | 0.50 | 2019 |
| FAE: Autoencoder-Based Failure Binning of RTL Designs for Verification and Debugging | 0 | 0.34 | 2019 |
| Parcel-Fit: Low Network-Overhead Service-Chain Deployment for Better Datacenter Performance | 0 | 0.34 | 2019 |
| P4-TPG: Accelerating Deterministic Parallel Test Pattern Generation by Preemptive, Proactive, and Preventive Schedulings. | 0 | 0.34 | 2019 |
| In-network Congestion-aware Load Balancing at Transport Layer | 0 | 0.34 | 2018 |
| Online task scheduler in 3D-MCPs with TADVA. | 0 | 0.34 | 2018 |
| Accurate performance evaluation of VLSI designs with selected CMOS process parameters. | 0 | 0.34 | 2018 |
| Unleashing Parallelism With Minimal Test Inflation in Multi-Threaded Test Pattern Generation. | 0 | 0.34 | 2018 |
| Skew-Aware Functional Timing Analysis Against Setup Violation for Post-Layout Validation | 0 | 0.34 | 2018 |
| Improving Quality of Experience of Service-Chain Deployment for Multiple Users | 0 | 0.34 | 2018 |
| Tvm: Tabular Vm Migration For Reducing Hop Violations Of Service Chains In Cloud Datacenters | 0 | 0.34 | 2017 |
| Radiation-Hardened Designs for Soft-Error-Rate Reduction by Delay-Adjustable D-Flip-Flops. | 1 | 0.40 | 2017 |
| FASIC: A Fast-Recovery, Adaptively Spanning In-Band Control Plane in Software-Defined Network. | 0 | 0.34 | 2017 |
| Accelerating functional timing analysis with encoding duplication removal and redundant state propagation. | 0 | 0.34 | 2017 |
| Coupling-Aware Functional Timing Analysis for Tighter Bounds: How Much Margin Can We Relax? | 0 | 0.34 | 2017 |
| Speeding up power verification by merging equivalent power domains in RTL design with UPF | 1 | 0.37 | 2017 |
| Layout-Based Soft Error Rate Estimation Framework Considering Multiple Transient Faults - From Device to Circuit Level. | 5 | 0.47 | 2016 |
| Speed binning with high-quality structural patterns from functional timing analysis (FTA) | 0 | 0.34 | 2016 |
| Fast-yet-accurate variation-aware current and voltage modelling of radiation-induced transient fault | 2 | 0.48 | 2016 |
| Reducing network cost of minimal-migration based VM management in cloud datacenters | 0 | 0.34 | 2016 |
| TA-FTA: transition-aware functional timing analysis with a four-valued encoding | 3 | 0.44 | 2015 |
| A Determinate Radiation Hardened Technique for Safety-Critical CMOS Designs | 2 | 0.38 | 2015 |
| An online thermal-constrained task scheduler for 3D multi-core processors | 6 | 0.44 | 2015 |
| EQVMP: Energy-efficient and QoS-aware virtual machine placement for software defined datacenter networks | 14 | 0.62 | 2014 |
| Advanced Soft-Error-Rate (SER) Estimation with Striking-Time and Multi-Cycle Effects | 4 | 0.44 | 2014 |
| Fall Detection by a SVM-Based Cloud System with Motion Sensors. | 3 | 0.42 | 2013 |
| Process-variation-aware Iddq diagnosis for nano-scale CMOS designs - the first step | 0 | 0.34 | 2013 |
| Fast-Yet-Accurate Statistical Soft-Error-Rate Analysis Considering Full-Spectrum Charge Collection | 8 | 0.55 | 2013 |
| D2ENDIST-FM: Flow migration in routing of OpenFlow-based cloud networks. | 0 | 0.34 | 2013 |
| Statistical Soft Error Rate (SSER) Analysis for Scaled CMOS Designs | 1 | 0.35 | 2012 |
| Spatial-correlation-aware soft error rate analysis using quasi-importance sampling | 1 | 0.38 | 2012 |
| D2ENDIST: Dynamic and disjoint ENDIST-based layer-2 routing algorithm for cloud datacenters | 0 | 0.34 | 2012 |
| Diagnosing Multiple Byzantine Open-Segment Defects Using Integer Linear Programming. | 0 | 0.34 | 2011 |
| Accurate statistical soft error rate (SSER) analysis using a quasi-Monte Carlo framework with quality cell models | 14 | 0.71 | 2010 |
| Portable Simulation/Emulation Stimulus On An Industrial-Strength Soc | 0 | 0.34 | 2009 |
| Speeding Up Bounded Sequential Equivalence Checking With Cross-Timeframe State-Pair Constraints From Data Learning | 0 | 0.34 | 2009 |
| On soft error rate analysis of scaled CMOS designs — A statistical perspective | 4 | 0.44 | 2009 |
| An incremental learning framework for estimating signal controllability in unit-level verification | 3 | 0.43 | 2007 |
| Extracting a simplified view of design functionality based on vector simulation | 5 | 0.47 | 2006 |
| Simulation-based functional test justification using a decision-digram-based Boolean data miner | 1 | 0.36 | 2006 |
| Extracting a simplified view of design functionality via vector simulation | 0 | 0.34 | 2006 |
