Mokhtar Nibouche - Citegraph

Author Info

Name	Affiliation	Papers
MOKHTAR NIBOUCHE	Faculty of Computing, Engineering and Mathematical Sciences, The University of the West of England, Coldharbour Lane, Bristol BS16 1QY, UK	26
Collaborators	Citations	PageRank
27	50	11.87
Referers	Referees	References
138	228	121

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100228

Publications (26 rows)

Collaborators (27 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
U-Model Enhanced Control Of Non-Minimum Phase Systems	0	0.34	2020
Feed-Forward Selection of Cerebellar Models for Calibration of Robot Sound Source Localization.	0	0.34	2019
Self-adaptive Context Aware Audio Localization for Robots Using Parallel Cerebellar Models.	0	0.34	2017
Complexity reduction in the H.264/AVC using highly adaptive fast mode decision based on macroblock motion activity	0	0.34	2015
A fast and efficient inter mode decision algorithm for the H.264/AVC video coding standard	0	0.34	2013
Porting a H264/AVC adaptive in loop deblocking filter to a TI DM6437EVM DSP	1	0.35	2012
A Biologically Inspired Hardware Module for Embedded Auditory Signal Processing Applications	0	0.34	2009
Fitness Evaluation Expansion to Enhance GA'S Performance in Evolvable Hardware	2	0.45	2008
Evolutionary Electronics: A Novel Approach and the Effects of Geometry-related Parameters on Performance	0	0.34	2008
Towards Evolving Fault Tolerant Biologically Inspired Hardware Using Evolutionary Algorithms	7	0.64	2007
Evolvable Embryonics: Promising Early Results to An Automatic Design of Self-Repair Hardware System	1	0.37	2007
Steps forward to evolve bio-inspired embryonic cell-based electronic systems	2	0.38	2007
A Hardware Based Implementation Of A Tactile Sensory System For Neuromorphic Signal Processing Applications	2	0.70	2006
A real-time, FPGA based, biologically plausible neural network processor	10	1.22	2005
Design and FPGA implementation of an embedded real-time biologically plausible spiking neural network processor	6	0.63	2005
Fast Architectures For Fpga-Based Implementation Of Rsa Encryption Algorithm	7	0.61	2004
New iterative algorithms for modular multiplication	1	0.36	2004
Design and implementation of a wavelet based system.	1	0.39	2003
High speed FPGA implementation of RSA encryption algorithm.	0	0.34	2003
FPGA-Based Discrete Wavelet Transforms System	5	0.65	2001
Bit-Level Architectures For Montgomery'S Multiplication	0	0.34	2001
Rapid prototyping of orthonormal wavelet transforms on FPGAs	0	0.34	2001
New Iterative Algorithms And Architectures Of Modular Multiplication For Cryptography	1	0.38	2001
New architectures for serial-serial multiplication	2	0.44	2001
An FPGA-based wavelet transforms coprocessor	2	0.57	2001
A low latency bi-directional serial-parallel multiplier architecture	0	0.34	2000