Chia-Ming Tsai - Citegraph

Author Info

Name	Affiliation	Papers
CHIA-MING TSAI	Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu, Taiwan	30
Collaborators	Citations	PageRank
58	172	14.19
Referers	Referees	References
552	592	265

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100592

Publications (30 rows)

Collaborators (58 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
A VVC Proposal with Quaternary Tree plus Binary-Ternary Tree Coding Block Structure and Advanced Coding Techniques	1	0.35	2020
Resident activity recognition based on binary infrared sensors and soft computing.	0	0.34	2019
Mitigating Asymmetric Nonlinear Weight Update Effects in Hardware Neural Network based on Analog Resistive Synapse.	2	0.50	2018
A Knowledge-Based Step Length Estimation Method Based on Fuzzy Logic and Multi-Sensor Fusion Algorithms for a Pedestrian Dead Reckoning System.	2	0.39	2016
A 0.6V, 1.3GHz dynamic comparator with cross-coupled latches	1	0.36	2015
Learning-based movie summarization via role-community analysis and feature fusion	1	0.36	2015
A 10Gb/s 44.2 dB adaptive equalizer with Duobinary tracking loop in 0.18µm CMOS	0	0.34	2014
A Video Saliency Detection Model in Compressed Domain	94	1.81	2014
Activity awareness based on simple sensors	1	0.37	2014
Constructing a Diet Recommendation System Based on Fuzzy Rules and Knapsack Method.	1	0.40	2013
A 6Gb/s 40dB burst-mode digitally adaptive equalizer with reference-calibrated overshoot control	0	0.34	2013
Scene-Based Movie Summarization Via Role-Community Networks	21	0.66	2013
Low-overhead content-adaptive spatial scalability for scalable video coding	2	0.37	2013
Video saliency detection in the compressed domain	7	0.50	2012
A 10 Gb/s adaptive cable equalizer using phase detection technique in 0.13µm CMOS technology.	0	0.34	2012
A 6Gb/s adaptive equalizer using overshoot control in 0.18µm CMOS technology.	1	0.40	2012
Image retargeting based on the sensitivity-tuned visual significance map	1	0.35	2011
Maintaining temporal coherence in video retargeting using mosaic-guided scaling.	23	0.81	2011
A 3-Ghz, 22-Ps/Dec Dynamic Comparator Using Negative Resistance Combined With Input Pair	0	0.34	2010
A 40 mW 3 Gb/s Self-Compensated Differential Transimpedance Amplifier With Enlarged Input Capacitance Tolerance in 0.18 $\mu$ m CMOS Technology	0	0.34	2009
A comparative study on attention-based rate adaptation for scalable video coding	3	0.42	2009
A 10Gb/s Laser-Diode Driver with Active Back-Termination in 0.18μm CMOS	3	0.69	2008
H.264 error resilience coding based on multi-hypothesis motion-compensated prediction	3	0.44	2007
Fast Mode Decision Algorithms for Adaptive GOP Structure in the Scalable Extension of H.264/AVC	0	0.34	2007
A 40mW 3.5kΩ 3Gb/s CMOS Differential Transimpedance Amplifier Using Negative-Impedance Compensation	3	0.79	2007
H.264 Error Resilience Coding Based on Multi-hypothesis Motion Compensated Prediction and Adaptive Intra-refresh	1	0.35	2006
A 24mW 1.25Gb/s 13k/spl Omega/ transimpedance amplifier using active compensation	0	0.34	2006
13.4 A 24mW 1.25Gb/s 13kΩ Transimpedance Amplifier Using Active Compensation	0	0.34	2006
10 Gb/s CMOS laser driver with 3.3 V/sub pp/ output swing.	0	0.34	2005
A 3.5-Gb/s CMOS burst-mode laser driver with automatic power control using single power supply	1	0.48	2005