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KRISHNASWAMY NAGARAJ
Author Info
Open Visualization
Name
Affiliation
Papers
KRISHNASWAMY NAGARAJ
Texas Instruments Inc, Dallas, TX 75243 USA
7
Collaborators
Citations
PageRank
26
40
14.10
Referers
Referees
References
117
88
23
Search Limit
100
117
Publications (7 rows)
Collaborators (26 rows)
Referers (100 rows)
Referees (88 rows)
Title
Citations
PageRank
Year
Digital Built-in Self-Test for Phased Locked Loops to Enable Fault Detection
0
0.34
2019
A 12-/14-Bit, 4/2msps, 0.085mm(2) Sar Adc In 65nm Using Novel Residue Boosting
0
0.34
2017
Corrections to "Area-Efficient Low-Noise Low-Spur Architecture for an Analog PLL Working From a Low Frequency Reference".
0
0.34
2014
Architectures and Circuit Techniques for Multi-Purpose Digital Phase Lock Loops.
3
0.47
2013
Area-Efficient Low-Noise Low-Spur Architecture for an Analog PLL Working From a Low Frequency Reference
2
0.47
2012
A Novel fractional-n PLL Based on a Simple Reference Multiplier.
2
0.38
2012
A 250-mW, 8-b, 52-Msamples/s parallel-pipelined A/D converter with reduced number of amplifiers
33
11.77
1997
1