Janick Bergeron - Citegraph

Author Info

Name	Affiliation	Papers
JANICK BERGERON	AnalySYS Inc., 25 Loiselle St. Suite 201, Embrun, Ontario, Canada K0A 1W1	6
Collaborators	Citations	PageRank
21	7	3.87
Referers	Referees	References
22	9	2

Publications (6 rows)

Collaborators (21 rows)

Referers (22 rows)

Referees (9 rows)

Title	Citations	PageRank	Year
Advances in low power verification	1	0.44	2008
Panel: Unified approach leading to a seamlessly evolving test bench for all phases of a multi-core design, validation and production test	0	0.34	2007
Is methodology the highway out of verification hell?	0	0.34	2005
Modeling Usable and Reusable Transactors in System Verilog	0	0.34	2005
Panel: Your Core - My Problem? Integration and Verification of IP	1	0.35	2001
Accelerating concurrent hardware design with behavioural modelling and system simulation	5	2.07	1995

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