Timing closure of clock enable signals on a 32 nm Intel Itanium processor | 0 | 0.34 | 2018 |
A telemetry design for anticipating train-road crossing collisions | 0 | 0.34 | 2015 |
Virtual traffic lights: Managing intersections in the cloud | 0 | 0.34 | 2015 |
Synthesis flow for designing a high performance microprocessor. | 0 | 0.34 | 2012 |