| Termination detection for fine-grained message-passing architectures | 0 | 0.34 | 2020 |
| Design and Implementation of Reconfigurable Asynchronous Pipelines | 0 | 0.34 | 2020 |
| Automating the Design of Asynchronous Logic Control for AMS Electronics | 3 | 0.80 | 2020 |
| Build systems a la carte: Theory and practice | 0 | 0.34 | 2020 |
| Formal Verification of Spacecraft Control Programs | 0 | 0.34 | 2020 |
| Selective applicative functors | 0 | 0.34 | 2019 |
| Complexity of Linear Operators. | 0 | 0.34 | 2019 |
| Formal verification of spacecraft control programs (experience report). | 0 | 0.34 | 2019 |
| Efficient composition of scenario-based hardware specifications | 0 | 0.34 | 2019 |
| On the Complexity of Hazard-free Circuits | 0 | 0.34 | 2019 |
| Generalised Asynchronous Arbiter | 0 | 0.34 | 2019 |
| Formal Verification of Spacecraft Control Programs Using a Metalanguage for State Transformers. | 0 | 0.34 | 2018 |
| Reconfigurable Asynchronous Pipelines: From Formal Models To Silicon | 0 | 0.34 | 2018 |
| Build systems à la carte | 1 | 0.38 | 2018 |
| Concurrency Oracles for Free. | 0 | 0.34 | 2018 |
| High-Level Asynchronous Concepts at the Interface Between Analog and Digital Worlds. | 2 | 0.46 | 2018 |
| Formal Verification of Mixed Synchronous Asynchronous Systems Using Industrial Tools | 0 | 0.34 | 2018 |
| Voltage, Throughput, Power, Reliability, and Multicore Scaling. | 2 | 0.41 | 2017 |
| Distributed Event-Based Computing. | 0 | 0.34 | 2017 |
| Ultra-Low Energy Data Driven Computing Using Asynchronous Micropipelines and Nano-Electro-Mechanical Relays | 0 | 0.34 | 2017 |
| Process Windows. | 0 | 0.34 | 2017 |
| An Empirical Comparison of Formalisms for Modelling and Analysis of Dynamic Reconfiguration of Dependable Systems. | 0 | 0.34 | 2017 |
| Programming Model to Develop Supercomputer Combinatorial Solvers | 0 | 0.34 | 2017 |
| Algebraic graphs with class (functional pearl). | 3 | 0.42 | 2017 |
| Xprova: Formal Verification Tool with Built-in Metastability Modeling | 1 | 0.37 | 2017 |
| Language and hardware acceleration backend for graph processing | 0 | 0.34 | 2017 |
| Asynchronous Arbitration Primitives for New Generation of Circuits and Systems | 1 | 0.63 | 2017 |
| Formal Design and Verification of an Asynchronous SRAM Controller | 1 | 0.35 | 2017 |
| Reduction of Order Structures | 1 | 0.35 | 2017 |
| WAITX: An Arbiter for Non-persistent Signals | 1 | 0.35 | 2017 |
| Benefits of asynchronous control for analog electronics: Multiphase buck case study. | 2 | 0.38 | 2017 |
| Mining Conditional Partial Order Graphs from Event Logs. | 2 | 0.40 | 2016 |
| Formal Verification Of Clock Domain Crossing Using Gate-Level Models Of Metastable Flip-Flops | 1 | 0.42 | 2016 |
| Non-recursive make considered harmful: build systems at scale. | 3 | 0.43 | 2016 |
| Desugaring Haskell's do-notation into applicative operations. | 4 | 0.46 | 2016 |
| Design and Verification of Speed-Independent Multiphase Buck Controller | 8 | 0.66 | 2015 |
| On Hyperbolic Laws Of Capacitor Discharge Through Self-Timed Digital Loads | 1 | 0.36 | 2015 |
| Guest Editorial for Special Issue Application of Concurrency to System Design | 0 | 0.34 | 2015 |
| A Heuristic Algorithm for Deriving Compact Models of Processor Instruction Sets | 2 | 0.37 | 2015 |
| Compositional design of asynchronous circuits from behavioural concepts | 4 | 0.50 | 2015 |
| Design of safety critical systems by refinement | 0 | 0.34 | 2014 |
| On Formalisms for Dynamic Reconfiguration of Dependable Systems. | 0 | 0.34 | 2014 |
| Direct Construction of Complete Merged Processes. | 1 | 0.35 | 2014 |
| Design-for-adaptivity of microarchitectures | 1 | 0.41 | 2013 |
| Concurrent Multiresource Arbiter: Design and Applications | 2 | 0.38 | 2013 |
| Algebra of Parameterised Graphs | 6 | 0.60 | 2012 |
| Adapting Asynchronous Circuits to Operating Conditions by Logic Parametrisation | 6 | 0.57 | 2012 |
| On Dual-Rail Control Logic for Enhanced Circuit Robustness | 1 | 0.35 | 2012 |
| Mixed Radix Reed-Muller Expansions | 0 | 0.34 | 2012 |
| An algorithm for direct construction of complete merged processes | 4 | 0.45 | 2011 |
