Fast Residue-to-Binary Conversion Using Base Extension and the Chinese Remainder Theorem | 1 | 0.35 | 2007 |
Implementations of square-root and exponential functions for large FPGAs | 3 | 0.54 | 2006 |
Exploiting Java-ILP on a Simultaneous Multi-Trace Instruction Issue (SMTI) Processor | 5 | 0.47 | 2003 |
Design and Implementation of Java Processors | 0 | 0.34 | 2003 |
DSTRIDE: data-cache miss-address-based stride prefetching scheme for multimedia processors | 2 | 0.37 | 2001 |
Performance of a context cache for a mulithreaded pipeline | 3 | 0.55 | 1998 |
A model for the parallel execution of subset-equational languages | 0 | 0.34 | 1995 |
On function languages and parallel computers | 3 | 0.91 | 1991 |