Eiji Fujiwara - Citegraph

Author Info

Name	Affiliation	Papers
EIJI FUJIWARA	Tokyo Inst Technol, Grad Sch Informat Sci & Engn, Meguro Ku, Tokyo 1528552, Japan	41
Collaborators	Citations	PageRank
21	180	31.14
Referers	Referees	References
296	277	189

Search Limit

100296

Publications (41 rows)

Collaborators (21 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Macwilliams Identity For M-Spotty Weight Enumerator	3	0.47	2010
Joint source-cryptographic-channel coding for dependable systems	0	0.34	2009
A Class Of Array Codes Correcting A Cluster Of Unidirectional Errors For Two-Dimensional Matrix Symbols	0	0.34	2009
M-Ary Substitution/Deletion/Insertion/Adjacent-Symbol-Transposition Error Correcting Codes For Data Entry Systems	0	0.34	2009
Three-Level Error Control Coding for Dependable Solid-State Drives	1	0.37	2008
Nonbinary single-symbol error correcting, adjacent two-symbol transposition error correcting codes over integer rings	0	0.34	2007
Reconstruction of Erasure Correcting Codes for Dependable Distributed Storage System without Spare Disks	0	0.34	2007
A General Class of M-Spotty Byte Error Control Codes	10	1.34	2007
Joint source-cryptographic-channel coding based on linear block codes	2	0.42	2007
Low-Density Triple-Erasure Correcting Codes for Dependable Distributed Storage Systems	3	0.68	2006
Complex M-Spotty Byte Error Control Codes	0	0.34	2006
Parallel Decoding Cyclic Burst Error Correcting Codes	4	0.57	2005
Transient Behavior of the Encoding/Decoding Circuits of Error Correcting Codes	1	0.41	2005
A Class of M-Ary Asymmetric Symbol Error Correcting Codes for Data Entry Devices	6	1.18	2004
Nonsystematic M-Ary Asymmetric Error Correcting Codes Designed by Multilevel Coding Method	1	0.41	2004
A Class Of Codes For Correcting Single Spotty Byte Errors	2	0.37	2003
Array Codes Correcting a Cluster of Unidirectional Errors for Two-Dimensional Matrix Symbols	1	0.39	2003
A class of random multiple bits in a byte error correcting and single byte error detecting (Stb/EC-SbED) codes	19	2.39	2003
Two-Level Unequal Error Protection Codes With Burst And Bit Error Correcting Capabilities	0	0.34	2002
A Class of Random Multiple Bits in a Byte Error Correcting (S t/b EC)Codes for Semiconductor Memory Systems	1	0.68	2002
Unequal Error Protection Codes with Two-Level Burst and Bit Error Correcting Capabilities	2	0.44	2001
A Class Of Systematic T/B-Error Correcting Codes For Semiconductor Memory Systems	0	0.34	2001
A class of systematic m-ary single-symbol error correcting codes	3	0.75	2001
Evaluations of burst error recovery for VF arithmetic coding	0	0.34	2000
Single Byte Error Control Codes with Double Bit within a Block Error Correcting Capability for Semiconductor Memory Systems	1	0.48	2000
Systematic Deletion/Insertion Error Correcting Codes with Random Error Correction Capability	6	0.71	1999
Optimal Two-Level Unequal Error Control Codes for Computer Systems	2	0.48	1998
A Class of Error Control Codes for Byte Organized Memory Systems -SbEC-(Sb+S)ED Codes-	5	0.71	1997
Reliable Logic Circuits with Byte Error Control Codes: A Feasibility Study.	5	0.56	1996
Probability to achieve TSC goal	17	1.75	1996
Defect-Tolerant Wsi File Memory System Using Address Permutation For Spare Allocation	0	0.34	1995
Fault-tolerant associate memories	1	0.37	1995
Defect-Tolerant WSI File Memory System Using Address Permutation for Spare Allocation.	0	0.34	1995
A Probabilistic Measurement for Totally Self-Checking Circuits	4	0.55	1993
A class of error-locating codes for byte-organized memory systems	3	0.44	1993
A Defect-Tolerant WSI File Memory System Using Address Permutation Scheme for Spare Allocation	0	0.34	1993
Single b-bit byte error correcting and double bit error detecting codes for high-speed memory systems	8	2.21	1992
Error-Control Coding in Computers	34	4.56	1990
Fault - tolerant k - out - of - n logic unit networks.	0	0.34	1988
Masking asymmetric line faults using semi-distance codes.	6	1.00	1988
A self-checking generalized prediction checker and its use for built-in testing	29	2.07	1987