Nonlinear Code-Based Low-Overhead Fine-Grained Control Flow Checking | 0 | 0.34 | 2022 |
Compact Protection Codes for protecting memory from malicious data and address manipulations | 0 | 0.34 | 2021 |
On resilience of security-oriented error detecting architectures against power attacks: a theoretical analysis | 0 | 0.34 | 2021 |
Protecting Multi-Level Memories From Jamming Using Q-ary Expurgated Robust Codes | 0 | 0.34 | 2021 |
Constructive Bounds on the Capacity of Parallel Asynchronous Skew-Free Channels with Glitches | 0 | 0.34 | 2020 |
On the existence of security enhancing converter designs for multi-level memories | 0 | 0.34 | 2020 |
Nonlinear Codes for Control Flow Checking | 0 | 0.34 | 2020 |
Temporal Power Redistribution as a Countermeasure against Side-Channel Attacks | 0 | 0.34 | 2020 |
An SRAM-Based PUF With a Capacitive Digital Preselection for a 1E-9 Key Error Probability | 2 | 0.40 | 2020 |
High rate robust codes with low implementation complexity | 1 | 0.35 | 2019 |
Silicon Proven 1.8 µm × 9.2 µm 65-nm Digital Bit Generator for Hardware Security Applications. | 0 | 0.34 | 2019 |
A 7T Security Oriented SRAM Bitcell | 0 | 0.34 | 2019 |
Nonlinear Product Codes for Reliability and Security | 0 | 0.34 | 2019 |
Toward Error-Correcting Architectures for Cryptographic Circuits Based on Rabii–Keren Codes | 0 | 0.34 | 2019 |
On the Reliability of the Ring Oscillator Physically Unclonable Functions | 1 | 0.45 | 2019 |
Power Analysis Resilient SRAM Design Implemented with a 1% Area Overhead Impedance Randomization Unit for Security Applications | 0 | 0.34 | 2019 |
A new class of security oriented error correcting robust codes | 0 | 0.34 | 2019 |
Low-Cost Pseudoasynchronous Circuit Design Style With Reduced Exploitable Side Information. | 2 | 0.44 | 2018 |
Leakage Power Attack-Resilient Symmetrical 8T SRAM Cell. | 1 | 0.41 | 2018 |
Utilization of Process and Supply Voltage Random Variations for Random Bit Generation | 0 | 0.34 | 2018 |
Embedded randomness and data dependencies design paradigm: Advantages and challenges | 0 | 0.34 | 2018 |
Detection and Correction of Malicious and Natural Faults in Cryptographic Modules. | 0 | 0.34 | 2018 |
CPA Secured Data-Dependent Delay-Assignment Methodology. | 2 | 0.37 | 2017 |
A Survey of the Sensitivities of Security Oriented Flip-Flop Circuits. | 0 | 0.34 | 2017 |
Vulnerability of secured IoT memory against localized back side laser fault injection | 0 | 0.34 | 2017 |
Reliable Communications Across Parallel Asynchronous Channels With Arbitrary Skews. | 3 | 0.47 | 2017 |
CMOS Based Gates for Blurring Power Information. | 4 | 0.43 | 2016 |
Efficient Implementation of Punctured Parallel Finite Field Multipliers | 1 | 0.35 | 2015 |
DPA-Secured Quasi-Adiabatic Logic (SQAL) for Low-Power Passive RFID Tags Employing S-Boxes | 18 | 0.86 | 2015 |
Relations Between the Entropy of a Source and the Error Masking Probability for Security-Oriented Codes | 4 | 0.42 | 2015 |
A New Approach to UEP-HARQ via Convolutional Codes | 0 | 0.34 | 2015 |
Randomized Multitopology Logic Against Differential Power Analysis | 11 | 0.52 | 2015 |
Data-Dependent Delays as a Barrier Against Power Attacks | 11 | 0.58 | 2015 |
Universal Hardware for Systems With Acceptable Representations as Low Order Polynomials | 0 | 0.34 | 2014 |
A new efficiency criterion for security oriented error correcting codes | 2 | 0.38 | 2014 |
Protecting cryptographic hardware against malicious attacks by nonlinear robust codes | 9 | 0.50 | 2014 |
Robust Generalized Punctured Cubic Codes | 6 | 0.48 | 2014 |
Enhancement of Hardware Security by Hamming-Ball Based State Assignment | 2 | 0.38 | 2013 |
An Introduction to Robust Codes over Finite Fields | 1 | 0.35 | 2013 |
On the Efficiency of Berger Codes Against Error Injection Attacks on Parallel Asynchronous Communication Channels | 0 | 0.34 | 2013 |
Amalgamated q-ary codes for multi-level flash memories | 0 | 0.34 | 2012 |
Punctured Karpovsky-Taubin binary robust error detecting codes for cryptographic devices | 6 | 0.53 | 2012 |
Functional level embedded self testing for Walsh transform based adaptive hardware | 1 | 0.43 | 2012 |
Generalized If-Then-Else Operator for Compact Polynomial Representation of Multi Output Functions | 0 | 0.34 | 2011 |
Determining the Number of Paths in Decision Diagrams by Using Autocorrelation Coefficients | 3 | 0.54 | 2011 |
Duplication Based One-to-Many Coding for Trojan HW Detection | 0 | 0.34 | 2010 |
One-to-Many: Context-Oriented Code for Concurrent Error Detection | 1 | 0.37 | 2010 |
Arbitrary Error Detection in Combinational Circuits by Using Partitioning | 1 | 0.36 | 2008 |
Reduction of Average Path Length in Binary Decision Diagrams by Spectral Methods | 5 | 0.45 | 2008 |
Use Of Gray Decoding For Implementation Of Symmetric Functions | 5 | 0.46 | 2007 |