A Smaller, Faster, and More Energy-Efficient Complementary STT-MRAM Cell Uses Three Transistors and a Ground Grid: More Is Actually Less. | 1 | 0.39 | 2017 |
STT-MRAM cell design with partial source line planes: improving the trade-off between area and series resistance | 1 | 0.42 | 2015 |
Exploration of Lattice Reduction Aided Soft-Output MIMO Detection on a DLP/ILP Baseband Processor | 2 | 0.39 | 2013 |
A C-programmable baseband processor with inner modem implementations for LTE Cat-4/5/7 and Gbps 80MHz 4×4 802.11ac (invited) | 0 | 0.34 | 2013 |
Processor based 20Mhz 4×4 Cat-5 LTE MIMO receiver with advanced detectors | 0 | 0.34 | 2013 |
Overview of a Software Defined Downlink Inner Receiver for Category-E LTE-Advanced UE | 4 | 0.45 | 2011 |