Yi-Chung Chen - Citegraph

Author Info

Name	Affiliation	Papers
YI-CHUNG CHEN	NYU, Polytech Inst, Dept Elect & Comp Engn, Brooklyn, NY USA	31
Collaborators	Citations	PageRank
74	69	13.39
Referers	Referees	References
176	536	197

Search Limit

100536

Publications (31 rows)

Collaborators (74 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Development of Lightweight RBF-DRNN and Automated Framework for CNC Tool-Wear Prediction	0	0.34	2022
Applying Check-in Data and User Profiles to Identify Optimal Store Locations in a Road Network	0	0.34	2022
Estate price prediction system based on temporal and spatial features and lightweight deep learning model	0	0.34	2022
Joint Promotion Partner Recommendation Systems Using Data From Location-Based Social Networks	0	0.34	2021
Navigation Flow Modeling As A Basis For The Automatic Generation Of Android Apps	0	0.34	2021
Selection Of Key Features For Pm2.5 Prediction Using A Wavelet Model And Rbf-Lstm	1	0.37	2021
Stop Hiding Behind Windshield - A Windshield Image Enhancer Based on a Two-way Generative Adversarial Network.	0	0.34	2019
Head Motion Recognition Using a Smart Helmet for Motorcycle Riders	0	0.34	2019
Using People Flow Data to Analyze Retail Store Placement - Using Feng Chia University Dining Locations as Examples.	0	0.34	2019
Automatic machine status prediction in the era of Industry 4.0: Case study of machines in a spring factory.	1	0.35	2017
Golf Swing Motion Detection Using An Inertial-Sensor-Based Portable Instrument	0	0.34	2016
Finding Depth-k Skyline Friends in Distributed Social Networks by Using Neuro-fuzzy Networks.	0	0.34	2016
Library-Based Placement and Routing in FPGAs with Support of Partial Reconfiguration.	1	0.44	2016
A novel approach for m-representative skyline query.	0	0.34	2016
Facial Sketch Synthesis Using 2D Direct Combined Model-Based Face-Specific Markov Network.	3	0.37	2016
Hierarchical library based power estimator for versatile FPGAs	0	0.34	2015
Hierarchical Library Based Power Estimator for Versatile FPGAs.	0	0.34	2015
Finding similar users in social networks by using the depth-k skyline query	4	0.44	2015
BMP: a fast B*-tree based modular placer for FPGAs (abstract only)	1	0.38	2014
Hierarchical library-based power estimator for versatile FPGAs (abstract only)	0	0.34	2014
The Tires Worn Monitoring Prototype System Using Image Clustering Technology.	0	0.34	2013
A hardware security scheme for RRAM-based FPGA	2	0.36	2013
Non-volatile 3D stacking RRAM-based FPGA	18	0.80	2012
A Look Up Table design with 3D bipolar RRAMs	8	0.76	2012
uBRAM-based run-time reconfigurable FPGA and corresponding reconfiguration methodology	3	0.46	2012
A novel peripheral circuit for RRAM-based LUT	6	0.63	2012
3D-HIM: A 3D High-density Interleaved Memory for bipolar RRAM design	9	0.92	2011
A Hammerstein-Wiener Recurrent Neural Network with Frequency-Domain Eigensystem Realization Algorithm for Unknown System Identification	1	0.35	2009
A 1.2-V CMOS Limiter / RSSI / Demodulator for Low-IF FSK Receiver	10	0.98	2007
Interest-Based Lookup Protocols for Mobile Ad Hoc Networks	1	0.38	2005
WKeeper: a distributed Web filtering system for IPv6 home networks	0	0.34	2004