Analysis and Design of Cyclic Switched-Capacitor DC-DC Converters | 0 | 0.34 | 2019 |
Analysis and Design of Cyclic Switched-Capacitor DC-DC Converters. | 0 | 0.34 | 2019 |
Analysis and Design of a Multi-Step Bias-Flip Rectifier for Piezoelectric Energy Harvesting | 2 | 0.37 | 2019 |
A 1.2 pJ/cycle KHz Timer Circuit for Heavily Duty-Cycled Systems | 0 | 0.34 | 2018 |
Multi-Step Bias-Flip Rectification for Piezoelectric Energy Harvesting. | 0 | 0.34 | 2018 |
A Robust Level-Shifter Design for Adaptive Voltage Scaling | 2 | 0.49 | 2008 |
A low-power 333Mbps mobile-double data rate output driver with adaptive feedback to minimize overshoots and undershoots | 0 | 0.34 | 2007 |
A high performance, high voltage output buffer in a low voltage CMOS process | 1 | 0.48 | 2005 |