Author Info
Name
Affiliation
Papers
BRENDAN MULLANE
Department of Electronic&Computer Engineering (Mixed Signal Integrated Circuit Group), University of Limerick, Ireland
20
Collaborators
Citations 
PageRank 
25
17
7.81
Referers 
Referees 
References 
49
191
90
Search Limit
100191
Title
Citations
PageRank
Year
Comparison of High-Order Programmable Mismatch Shaping Bandpass DEM Implementations Applicable to Nyquist-Rate D/A Converters00.342021
A Higher-Order Programmable Amplitude and Timing Error Shaping Bandpass DEM for Nyquistrate D/A Converters00.342021
A Wideband 6th Order Programmable Bandpass DEM Implementation for a Nyquist DAC00.342020
High Order Mismatch Shaping for Low Oversampling Rates00.342020
A Tri-level Current-Steering DAC Design with Improved Output-Impedance Related Dynamic Performance00.342019
An In-Place Processor Design for Real-Value FFTs Targeting in-situ Dynamic ADC Test00.342018
Bandwidth Enhancement to Continuous-Time Input Pipeline ADCs.00.342018
A Reduced Hardware ISI and Mismatch Shaping DEM Decoder.10.412018
Correction to: A Reduced Hardware ISI and Mismatch Shaping DEM Decoder.00.342018
Experimental validation of DAC with nested bus-splitting EFM4 DDSM00.342013
A 100dB SFDR 0.5V pk-pk Band-Pass DAC Implemented on a Low Voltage CMOS Process.00.342011
High order mismatch noise shaping for bandpass DACs.00.342011
A high performance band-pass DAC architecture and design targeting a low voltage silicon process10.412011
An SOC platform for ADC test and measurement00.342009
A2DTest: A complete integrated solution for on-chip ADC self-test and analysis30.752009
An on-chip solution for static ADC test and measurement40.492009
IEEE 1500 Core Wrapper Optimization Techniques and Implementation00.342008
SoCECT: System on Chip Embedded Core Test30.532008
A Novel System on Chip (SoC) Test Solution20.402008
FPGA Prototyping of a Scan Based System-On-Chip Design30.432007