Ichiro Fujimori - Citegraph

Author Info

Name	Affiliation	Papers
ICHIRO FUJIMORI	Broadcom Corp, Irvine, CA 92617 USA	18
Collaborators	Citations	PageRank
86	127	34.90
Referers	Referees	References
388	216	51

Search Limit

100388

Publications (18 rows)

Collaborators (86 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
A 0.5-9.5-GHz, 1.2-µs Lock-Time Fractional-N DPLL With ±1.25%UI Period Jitter in 16-nm CMOS for Dynamic Frequency and Core-Count Scaling.	1	0.37	2017
F5: Wireline transceivers for Mega Data Centers: 50Gb/s and beyond	0	0.34	2017
EE4: Semiconductor economics: How business decisions are engineered.	0	0.34	2017
F4: Emerging short-reach and high-density interconnect solutions for internet of everything.	0	0.34	2016
10.3 An analog front-end for 100BASE-T1 automotive Ethernet in 28nm CMOS	0	0.34	2016
19.1 A 0.5-to-9.5GHz 1.2µs-lock-time fractional-N DPLL with ±1.25% UI period jitter in 16nm CMOS for dynamic frequency and core-count scaling in SoC.	0	0.34	2016
A 2.7 GHz to 7 GHz Fractional-N LC-PLL Utilizing Multi-Metal Layer SoC Technology in 28 nm CMOS	0	0.34	2015
F1: High-speed interleaved ADCs	0	0.34	2015
A Full-Duplex Line Driver for Gigabit Ethernet With Rail-to-Rail Class-AB Output Stage in 28 nm CMOS	8	1.35	2014
8.6 A full-duplex line driver for Gigabit Ethernet with rail-to-rail class-AB output stage in 28nm CMOS	0	0.34	2014
A 2.7GHz to 7GHz fractional-N LCPLL utilizing multimetal layer SoC technology in 28nm CMOS	0	0.34	2014
Session 7 overview: Optical transceivers and silicon photonics.	0	0.34	2013
Optical PCB interconnects, Niche or mainstream?	0	0.34	2012
A digital wideband CDR with ±15.6kppm frequency tracking at 8Gb/s in 40nm CMOS.	0	0.34	2011
A 500 mW ADC-Based CMOS AFE With Digital Calibration for 10 Gb/s Serial Links Over KR-Backplane and Multimode Fiber	34	2.49	2010
21.7 A 500mW digitally calibrated AFE in 65nm CMOS for 10Gb/s Serial links over backplane and multimode fiber	13	3.55	2009
A Fully Integrated 10-Gb/s Receiver With Adaptive Optical Dispersion Equalizer in 0.13-µm CMOS.	0	0.34	2007
A 90-dB SNR 2.5-MHz output-rate ADC using cascaded multibit delta-sigma modulation at 8/spl times/ oversampling ratio	71	22.75	2000

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