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SIMA SINAEI
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Name
Affiliation
Papers
SIMA SINAEI
Univ Tehran, Coll Engn, Sch Elect & Comp Engn, Digital Syst Level Design Lab, Tehran 14174, Iran
7
Collaborators
Citations
PageRank
2
1
2.38
Referers
Referees
References
3
203
86
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100
203
Publications (7 rows)
Collaborators (2 rows)
Referers (3 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
Multi-objective algorithms for the application mapping problem in heterogeneous multiprocessor embedded system design
1
0.35
2019
Run-time Mapping Algorithm for Dynamic Workloads on Heterogeneous MPSoCs Platforms
0
0.34
2018
Run-time mapping algorithm for dynamic workloads using association rule mining.
0
0.34
2018
Run-time resource allocation for embedded Multiprocessor System-on-Chip using tree-based design space exploration
0
0.34
2017
Run-time mapping algorithm for dynamic workloads using process merging transformations
0
0.34
2017
Novel Heuristic Mapping Algorithms for Design Space Exploration of Multiprocessor Embedded Architectures.
0
0.34
2016
An Mopso Method For Mapping Multimedia Applications Onto Mp-Soc Architectures
0
0.34
2011
1