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ALAN J. DRAKE
Author Info
Open Visualization
Name
Affiliation
Papers
ALAN J. DRAKE
University of Michigan, 1301 Beal Ave, Ann Arbor, MI
12
Collaborators
Citations
PageRank
57
70
7.26
Referers
Referees
References
241
246
51
Search Limit
100
246
Publications (12 rows)
Collaborators (57 rows)
Referers (100 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
Design Considerations for Reconfigurable Delay Circuit to Emulate System Critical Paths
1
0.36
2015
5.3 Wide-frequency-range resonant clock with on-the-fly mode changing for the POWER8 TM microprocessor
3
0.54
2014
Optimization and modeling of resonant clocking inductors for the POWER8TM microprocessor
0
0.34
2014
Single-cycle, pulse-shaped critical path monitor in the POWER7+ microprocessor
10
0.69
2013
Runtime power reduction capability of the IBM POWER7+ chip.
2
0.39
2013
Innovative practices session 7C: Self-calibration & trimming
0
0.34
2013
Voltage droop reduction using throttling controlled by timing margin feedback
4
0.45
2012
Active management of timing guardband to save energy in POWER7
45
1.86
2011
Two-dimensional position detection system with MEMS accelerometers, readout circuitry, and microprocessor for padless mouse applications
1
0.43
2005
Evaluation of Dynamic-Threshold Logic for Low-Power VLSI Design in 0.13um PD-SOI
1
0.36
2003
Two-dimensional position detection system with MEMS accelerometer for mouse applications
2
1.06
2001
CGaAs PowerPC FXU
1
0.44
2000
1