Name
Papers
Collaborators
JAEHWAN JOHN LEE
34
36
Citations 
PageRank 
Referers 
104
16.97
231
Referees 
References 
627
294
Search Limit
100627
Title
Citations
PageRank
Year
GStreamMiner: A GPU-accelerated Data Stream Mining Framework00.342016
Matrix-Based XML Stream Processing Using a GPU00.342015
Online Multi-Dimensional Regression Analysis On Concept-Drifting Data Streams00.342014
Context Generator and Behavior Translator in a Multilayer Architecture for a Modular Development Process of Cyber-Physical Robot Systems60.442014
Gpu Accelerated Item-Based Collaborative Filtering For Big-Data Applications90.562013
Hyper-structure mining of frequent patterns in uncertain data streams.20.372013
Particle Swarm Optimization on a GPU.60.442012
Instant Multiunit Resource Hardware Deadlock Detection Scheme for System-on-Chips00.342012
Multi-biomarker panel selection on a GPU00.342012
A parallel multi-unit resource deadlock detection algorithm with O(log2(min(m,n))) overall run-time complexity30.502011
StreamFitter: a real time linear regression analysis system for continuous data streams60.472011
A Novel Multicontext Coarse-Grained Reconfigurable Architecture (CGRA) For Accelerating Column-Oriented Databases00.342011
A True O(1) Parallel Deadlock Detection Algorithm for Single-Unit Resource Systems and Its Hardware Implementation70.532010
Symbiote: a reconfigurable logic assisted data streammanagement system (RLADSMS)00.342010
An O(n) Parallel Shortest Path Algorithm and Its Hardware Implementation00.342010
A General Purpose FPGA Data Filter for Data Stream Processing00.342010
Multiprocessor simulation using communicating sequential processes10.362010
An O(L) Parallel Shortest Path Algorithm10.362009
An XML-Based ADL Framework for Automatic Generation of Multithreaded Computer Architecture Simulators00.342009
A Novel Multicontext Coarse-Grained Join Accelerator for Column-Oriented Databases10.372009
A Novel O(1) Deadlock Detection Methodology for Multiunit Resource Systems and Its Hardware Implementation for System-on-Chip50.472008
A Parallel Deadlock Detection Algorithm with O(1) Overall Run-time Complexity00.342008
Characterization of TPC-H queries for a column-oriented database on a dual-core amd athlon processor10.352008
Main Memory DBMS on Modern Processors, a Scalable Approach for Database Performance Characterization Using Simulation00.342008
R-tree: A Hardware Implementation40.482008
A Novel O(1) Parallel Deadlock Detection Algorithm And Architecture For Multi-Unit Resource Systems10.382007
A Novel Parallel Deadlock Detection Algorithm and Hardware for Multiprocessor System-on-a-Chip30.542007
Design Space Exploration of Multiprocessor Systems with MultiContext Reconfigurable Co-Processors30.402007
Simulation Of Hybrid Computer Architectures: Simulators, Methodologies And Recommendations20.422007
An o(min(m, n)) parallel deadlock detection algorithm40.682005
A novel O(n) parallel banker's algorithm for System-on-a-Chip20.462005
A novel deadlock avoidance algorithm and its hardware implementation20.422004
A comparison of the RTU hardware RTOS with a hardware/software RTOS262.202003
A system-on-a-chip lock cache with task preemption support91.702001