Author Info
Name
Affiliation
Papers
YASUSHI NAKASAKI
Corporate Research & Development Center, Toshiba Corporation, 8 Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Japan
4
Collaborators
Citations 
PageRank 
17
0
1.35
Referers 
Referees 
References 
0
9
2
Title
Citations
PageRank
Year
Further Investigation on Mechanism of Trap Level Modulation in Silicon Nitride Films by Fluorine Incorporation00.342020
Study on mechanism of thermal curing in ultra-thin gate dielectrics00.342018
Mechanism of gate dielectric degradation by hydrogen migration from the cathode interface.00.342017
Time-dependent dielectric breakdown (TDDB) distribution in n-MOSFET with HfSiON gate dielectrics under DC and AC stressing.00.342013