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JOSUÉ FELIU
Author Info
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Name
Affiliation
Papers
JOSUÉ FELIU
Univ Politecn Valencia, Dept Comp Engn DISCA, Cami Vera S-N, Valencia 46022, Spain
13
Collaborators
Citations
PageRank
13
13
4.58
Referers
Referees
References
43
291
112
Search Limit
100
291
Publications (13 rows)
Collaborators (13 rows)
Referers (43 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
The Forward Slice Core: A High-Performance, Yet Low-Complexity Microarchitecture
0
0.34
2022
VMT: Virtualized Multi-Threading for Accelerating Graph Workloads on Commodity Processors
0
0.34
2022
Bandwidth-Aware Dynamic Prefetch Configuration for IBM POWER8.
1
0.35
2020
Thread Isolation to Improve Symbiotic Scheduling on SMT Multicore Processors.
0
0.34
2020
Precise Runahead Execution
0
0.34
2020
Precise Runahead Execution.
1
0.35
2019
A Workload Generator for Evaluating SMT Real-Time Systems
0
0.34
2018
Designing lab sessions focusing on real processors for computer architecture courses: A practical perspective.
0
0.34
2018
Perf&Fair: A Progress-Aware Scheduler to Enhance Performance and Fairness in SMT Multicores.
3
0.39
2017
Improving IBM POWER8 Performance Through Symbiotic Job Scheduling.
0
0.34
2017
Addressing Fairness in SMT Multicores with a Progress-Aware Scheduler
7
0.43
2015
Addressing bandwidth contention in SMT multicores through scheduling
1
0.35
2014
Using Huge Pages And Performance Counters To Determine The Llc Architecture
0
0.34
2013
1