| Dynamic Sharing in Multi-accelerators of Neural Networks on an FPGA Edge Device | 0 | 0.34 | 2020 |
| AFFIX - Automatic Acceleration Framework for FPGA Implementation of OpenVX Vision Algorithms. | 2 | 0.38 | 2019 |
| Scalable Multi-Queue Data Transfer Scheme for FPGA-Based Multi-Accelerators | 0 | 0.34 | 2018 |
| Distributed flow optimization control for energy-harvesting wireless sensor networks | 0 | 0.34 | 2014 |
| Energy Harvesting for Sustainable Smart Spaces. | 0 | 0.34 | 2012 |
| Hardware-Assisted Detection of Malicious Software in Embedded Systems | 24 | 0.98 | 2012 |
| QuARES: A quality-aware renewable energy-driven sensing framework | 1 | 0.35 | 2012 |
| Bandwidth Management in Application Mapping for Dynamically Reconfigurable Architectures | 0 | 0.34 | 2010 |
| Exploiting application data-parallelism on dynamically reconfigurable architectures: placement and architectural considerations | 13 | 0.98 | 2009 |
| Process variation aware system-level task allocation using stochastic ordering of delay distributions | 12 | 0.63 | 2008 |
| Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration | 2 | 0.36 | 2008 |
| Energy-Aware Co-Processor Selection For Embedded Processors On Fpgas | 2 | 0.38 | 2007 |
| Novel Multi-Layer floorplanning for Heterogeneous FPGAs | 4 | 0.46 | 2007 |
| Single-event-upset (SEU) awareness in FPGA routing | 17 | 0.81 | 2007 |
| Selective Bandwidth And Resource Management In Scheduling For Dynamically Reconfigurable Architectures | 2 | 0.38 | 2007 |
| Efficient Timing Budget Management for Accuracy Improvement in a Collaborative Object Tracking System | 0 | 0.34 | 2006 |
| PARLGRAN: parallelism granularity selection for scheduling task chains on dynamically reconfigurable architectures | 14 | 0.95 | 2006 |
| Physically-aware exploitation of component reuse in a partially reconfigurable architecture | 2 | 0.44 | 2006 |
| Minimizing Peak Power For Application Chains On Architectures With Partial Dynamic Reconfiguration | 1 | 0.35 | 2006 |
| FABSYN: floorplan-aware bus architecture synthesis | 23 | 1.04 | 2006 |
| Multi-layer Floorplanning on a Sequence of Reconfigurable Designs | 27 | 1.56 | 2006 |
| Integrating physical constraints in HW-SW partitioning for architectures with partial dynamic reconfiguration | 33 | 1.26 | 2006 |
| Heterogeneous Floorplanner for FPGA | 1 | 0.36 | 2006 |
| Physically-aware HW-SW partitioning for reconfigurable architectures with partial dynamic reconfiguration | 61 | 2.27 | 2005 |
| A scheduling algorithm for optimization and early planning in high-level synthesis | 11 | 0.72 | 2005 |
| Considering Run-Time Reconfiguration Overhead in Task Graph Transformations for Dynamically Reconfigurable Architectures | 7 | 0.63 | 2005 |
| Floorplan-aware automated synthesis of bus-based communication architectures | 34 | 1.49 | 2005 |
| A Unified Theory of Timing Budget Management | 36 | 1.66 | 2004 |
| Incremental Timing Budget Management in Programmable Systems | 0 | 0.34 | 2004 |
| Routability-Driven Packing: Metrics And Algorithms For Cluster-Based FPGAs | 16 | 0.92 | 2004 |
| On computation and resource management in an FPGA-based computation environment | 5 | 0.47 | 2003 |
| Customized regular channel design in FPGAs | 2 | 0.38 | 2003 |
| Pattern routing: use and theory for increasing predictability and avoiding coupling | 71 | 3.43 | 2002 |
| Budget Management with Applications | 13 | 1.02 | 2002 |
| RPack: routability-driven packing for cluster-based FPGAs | 24 | 1.45 | 2001 |
| Wirelength estimation based on rent exponents of partitioning and placement | 21 | 1.29 | 2001 |
| An exact algorithm for coupling-free routing | 20 | 1.29 | 2001 |
| Design and analysis of physical design algorithms | 5 | 0.65 | 2001 |
| Instruction generation for hybrid reconfigurable systems | 124 | 6.23 | 2001 |
