Name
Affiliation
Papers
ALESSANDRO CIMATTI
Fondazione Bruno Kessler — Irst, Italy
214
Collaborators
Citations 
PageRank 
291
5064
323.15
Referers 
Referees 
References 
5856
2272
3166
Search Limit
1001000
Title
Citations
PageRank
Year
The VMT-LIB Language and Tools.00.342022
A first-order logic characterisation of safety and co-safety languages00.342022
Diagnosability of fair transition systems00.342022
Semi-ProtoPNet Deep Neural Network for the Classification of Defective Power Grid Distribution Structures00.342022
Fairness, Assumptions, and Guarantees for Extended Bounded Response LTL plus FP Synthesis00.342021
Universal Invariant Checking Of Parametric Systems With Quantifier-Free Smt Reasoning00.342021
Optimization Modulo Non-linear Arithmetic via Incremental Linearization00.342021
Model-based Safety Assessment of a Triple Modular Generator with xSAP00.342021
Assumption-Based Runtime Verification of Infinite-State Systems00.342021
Proving the Existence of Fair Paths in Infinite-State Systems.00.342021
Temporal Planning With Intermediate Conditions And Effects00.342020
Reactive Synthesis from Extended Bounded Response LTL Specifications00.342020
Synthesis of P-Stable Abstractions.00.342020
SMT-based satisfiability of first-order LTL with event freezing functions and metric operators10.352020
Robustness Envelopes for Temporal Plans00.342019
Incremental linearization: A practical approach to satisfiability modulo nonlinear arithmetic and transcendental functions00.342018
Invariant Checking Of Nra Transition Systems Via Incremental Reduction To Lra With Euf60.462018
Satisfiability Modulo Transcendental Functions via Incremental Linearization.60.442018
Formal Specification and Verification of Dynamic Parametrized Architectures.00.342018
Timed Failure Propagation Analysis for Spacecraft Engineering: The ESA Solar Orbiter Case Study.00.342017
Verilog2smv: A Tool For Word-Level Verification00.342016
Automated Synthesis of Timed Failure Propagation Graphs.20.402016
From Electrical Switched Networks to Hybrid Automata.30.392016
An SMT-based approach to weak controllability for disjunctive temporal problems with uncertainty50.442015
The xSAP Safety Analysis Platform.160.772015
Strong Temporal Planning With Uncontrollable Durations: A State-Space Approach80.532015
Safety assessment of AltaRica models via symbolic model checking.70.522015
Contracts-refinement proof system for component-based embedded systems.190.762015
Smt-Based Validation Of Timed Failure Propagation Graphs60.552015
Parameter Synthesis with IC3 (Informal Presentation).00.342015
Comparing Different Functional Allocations in Automated Air Traffic Control Design.20.392015
Formal Design And Safety Analysis Of Air6110 Wheel Brake System150.722015
Formal Design of Asynchronous Fault Detection and Identification Components using Temporal Epistemic Logic.30.432015
Solving strong controllability of temporal problems with uncertainty using SMT170.702015
Efficient Anytime Techniques For Model-Based Safety Analysis90.562015
Formal Design of Fault Detection and Identification Components Using Temporal Epistemic Logic.70.512014
An Integrated Process for FDIR Design in Aerospace.60.602014
Non-deterministic policies in Markovian decision processes60.622014
IC3 Modulo Theories via Implicit Predicate Abstraction.341.022014
The nuXmv Symbolic Model Checker.341.422014
Computing small unsatisfiable cores in satisfiability modulo theories180.772014
Automated Planning and Model Checking (Dagstuhl Seminar 14482).00.342014
Spacecraft early design validation using formal methods.20.422014
A modular approach to MaxSAT modulo theories170.702013
Efficient Analysis of Reliability Architectures via Predicate Abstraction.20.372013
SMT-based scenario verification for hybrid systems140.662013
Automated Analysis of Reliability Architectures20.392013
Time-aware relational abstractions for hybrid systems110.492013
A Formal Framework for the Specification, Verification and Synthesis of Diagnosers.10.382013
Symbolic Synthesis of Observability Requirements for Diagnosability.40.462012
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