Name
Affiliation
Papers
VINCENZO CATANIA
Univ Catania, Dipartimento Ingn Informat & Telecomunicaz, Catania, Italy
117
Collaborators
Citations 
PageRank 
102
823
70.93
Referers 
Referees 
References 
1554
1723
1217
Search Limit
1001000
Title
Citations
PageRank
Year
Lambda: An Open Framework For Deep Neural Network Accelerators Simulation00.342021
Cloud-Based Energy Efficient Scheme for Sigfox Monarch as Asset Tracking Service00.342020
Exploiting Data Resilience in Wireless Network-on-chip Architectures20.392020
Improving Inference Latency and Energy of Network-on-Chip based Convolutional Neural Networks through Weights Compression00.342020
Improving Inference Latency and Energy of DNNs through Wireless Enabled Multi-Chip-Module-based Architectures and Model Parameters Compression00.342020
Networks-on-Chip based Deep Neural Networks Accelerators for IoT Edge Devices00.342019
Improving Energy Efficiency in Wireless Network-on-Chip Architectures.40.432018
Packetization Of Shared-Memory Traces For Message Passing Oriented Noc Simulation00.342018
Improving Energy Consumption Of Noc Based Architectures Through Approximate Communication00.342018
Performance analysis of visualmarkers for indoor navigation systems.30.462016
Security analysis and resource requirements of group-oriented user access control for hardware-constrained wireless network services.00.342016
A Context-Aware Smart Parking System.00.342016
Making Android Apps Data-Leak-Safe by Data Flow Analysis and Code Injection40.462016
Runtime Tunable Transmitting Power Technique in mm-Wave WiNoC Architectures80.492016
Exploiting antenna directivity in wireless NoC architectures.50.452016
Cycle-Accurate Network on Chip Simulation with Noxim.201.082016
A Context-Aware Solution to Improve Web Service Discovery and User-Service Interaction.00.342016
Improving The Energy Efficiency Of Wireless Network On Chip Architectures Through Online Selective Buffers And Receivers Shutdown00.342016
Energy efficient transceiver in wireless Network on Chip architectures.30.402016
Smart EDIFICE — Smart EveryDay interoperating future devICEs10.362015
Coupling Routing Algorithm and Data Encoding for Low Power Networks on Chip10.522015
Parameter Space Representation of Pareto Front to Explore Hardware-Software Dependencies00.342015
Autonomous Composition and Execution of REST APIs for Smart Sensors.20.432015
Computer Vision Based Indoor Navigation: A Visual Markers Evaluation10.352015
Noxim: An open, extensible and cycle-accurate network on chip simulator351.472015
A closed loop transmitting power self-calibration scheme for energy efficient WiNoC architectures50.442015
A Closed Loop Control based Power Manager for WiNoC Architectures00.342014
ARIIMA: A Real IoT Implementation of a Machine-Learning Architecture for Reducing Energy Consumption.50.442014
Merging Compilation and Microarchitectural Configuration Spaces for Performance/Power Optimization in VLIW-Based Systems10.362014
A Low-resource and Scalable Strategy for Segment Partitioning of Many-core Nano Networks10.372014
An approch for monitoring and smart planning of urban solid waste management using smart-M3 platform80.772014
Topology Discovery in Deadlock Free Self-assembled DNA Networks00.342014
Distributed topology discovery in self-assembled nano network-on-chip.50.862014
Low Energy Mapping Techniques Under Reliability And Bandwidth Constraints10.362013
A first effort for a distributed segment-based approach on self-assembled nano networks20.382013
An Adaptive Output Selection Function Based on a Fuzzy Rule Base System for Network on Chip40.392013
NoC links energy reduction through link voltage scaling20.412013
A study on evolutionary multi-objective optimization with fuzzy approximation for computational expensive problems40.432012
Designing Robust Routing Algorithms and Mapping Cores in Networks-on-Chip: A Multi-objective Evolutionary-based Approach.50.412012
A Novel Approach to Web of Things: M2M and Enhanced Javascript Technologies10.362012
Performance evaluation of efficient multi-objective evolutionary algorithms for design space exploration of embedded computer systems180.712011
An Efficient Technique for In-order Packet Delivery with Adaptive Routing Algorithms in Networks on Chip10.352010
An Effective Methodology to Multi-objective Design of Application Domain-specific Embedded Architectures10.362009
Linguistic Modifiers to Improve the Accuracy-Interpretability Trade-Off in Multi-Objective Genetic Design of Fuzzy Rule Based Classifier Systems30.352009
Data Encoding for Low-Power in Wormhole-Switched Networks-on-Chip60.462009
Application Specific Routing Algorithms for Networks on Chip752.572009
Feedforward artificial neural network to estimate iq of mental retarded people from different psychometric instruments10.382009
Psychology with soft computing: An integrated approach and its applications10.362008
Reducing complexity of multiobjective design space exploration in VLIW-based embedded systems10.362008
High Performance Computing for Embedded System Design: A Case Study10.382008
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