| An SoC-FPGA-Based Micro UGV with Localization and Motion Planning | 0 | 0.34 | 2019 |
| An SoC-FPGA-Based Micro UGV with Localization and Motion Planning. | 0 | 0.34 | 2019 |
| Improved face image super-resolution with restricted patch-searching area | 0 | 0.34 | 2019 |
| Ancient Asian Character Recognition for Literature Preservation and Understanding. | 0 | 0.34 | 2018 |
| A Platform on All-Programmable SoC for Micro Autonomous Robots | 1 | 0.37 | 2018 |
| Pipelining FPPGA-based defect detction in FPDs (abstract only) | 0 | 0.34 | 2014 |
| Multiple-degree-of-freedom motion data transmission using audio signal and its application in a presentation robot system | 0 | 0.34 | 2011 |
| Research activities on reconfigurable systems in Japan | 0 | 0.34 | 2011 |
| Autonomous Repair Fault Tolerant Dynamic Reconfigurable Device | 1 | 0.41 | 2008 |
| Implementation of AV Streaming System Using Peer-to-Peer Communication | 3 | 10.26 | 2007 |
| A Simulation Platform for Designing Cell-Array-Based Self-Reconfigurable Architecture | 0 | 0.34 | 2007 |
| Design Framework For Jpeg2000 System Architecture | 0 | 0.34 | 2006 |
| Autonomous-repair cell for fault tolerant dynamic-reconfigurable devices | 1 | 0.37 | 2006 |
| Fault Tolerant Dynamic Reconfigurable Device Based on EDAC with Rollback | 4 | 0.48 | 2006 |
| An Integrated Approach of Variable Ordering and Logic Mapping into LUT-Array-Based PLD | 0 | 0.34 | 2005 |
| Design of Realtime 3-D Sound Processing System | 3 | 0.52 | 2005 |
| Scalable Design Framework for JPEG2000 System Architecture | 2 | 0.51 | 2004 |
| Jpeg2000 High-Speed Progressive Decoding Scheme | 0 | 0.34 | 2004 |
| An Adaptive Load Distribution Model and Design on Self-Reconfigurable Logic Device | 1 | 0.40 | 2004 |
| High speed JPEG2000 encoder by configurable processor | 4 | 0.44 | 2002 |
| System-level design of IEEE1394 bus segment bridge | 0 | 0.34 | 2002 |
| JPEG2000 adaptive rate control for embedded systems | 10 | 0.98 | 2002 |
| Adaptive rate control for JPEG2000 image coding in embedded systems | 3 | 0.72 | 2002 |
| A design of LUT-array-based PLD and a synthesis approach based on sum of generalized complex terms expression | 0 | 0.34 | 2001 |
| IEEE1394 system simulation environment and a design of its link layer controller | 0 | 0.34 | 2001 |
| Asian distance training experiment using CALAT-PARTHENON courseware | 0 | 0.34 | 2001 |
| Air-pressure-model-based fast algorithms for general floorplan | 1 | 0.35 | 1998 |
