Author Info
Name
Affiliation
Papers
N. KURODA
Corp. Syst. LSI Dev. Div., Syst. LSI Technol. Dev. Center, Kyoto, Japan
2
Collaborators
Citations 
PageRank 
30
6
3.46
Referers 
Referees 
References 
26
17
3
Title
Citations
PageRank
Year
A 400-MHz random-cycle dual-port interleaved DRAM (D/sup 2/RAM) with standard CMOS Process00.342005
A 322 MHz random-cycle embedded DRAM with high-accuracy sensing and tuning63.122005