George Papakonstantinou

Author Info

Name	Affiliation	Papers
GEORGE PAPAKONSTANTINOU	Iroon Polytechneiou, School of Electrical and Computer Engineering, National Technical University of Athens, Zografou 15773, Athens, Greece	21
Collaborators	Citations	PageRank
28	134	14.52
Referers	Referees	References
229	391	292

Search Limit

100391

Publications (21 rows)

Collaborators (28 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Distributed dynamic load balancing for pipelined computations on heterogeneous systems	3	0.38	2011
Studying the impact of synchronization frequency on scheduling tasks with dependencies in heterogeneous systems	3	0.39	2010
A platform for the automatic generation of attribute evaluation hardware systems	2	0.39	2010
Efficient reconfigurable embedded parsers	3	0.41	2009
Cronus: A platform for parallel code generation based on computational geometry methods	1	0.35	2008
Enhancing self-scheduling algorithms via synchronization and weighting	10	0.53	2008
Exact ESCT minimization for functions of up to six input variables	7	0.73	2008
A flexible general-purpose parallelizing architecture for nested loops in reconfigurable platforms	1	0.37	2007
An efficient hardware implementation for AI applications	2	0.40	2006
Dynamic multi phase scheduling for heterogeneous cluste	16	0.68	2006
Reducing the Communication Cost via Chain Pattern Scheduling	2	0.38	2005
Minimization of Reversible Wave Cascades*This work has been partially funded by the project Protagoras/NTUA.	5	0.54	2005
Handling advanced scheduling heuristics under a hardware compiler generation environment	1	0.41	2002
On parallelization of UET/UET-UCT loops	3	0.43	2001
An efficient algorithm for the physical mapping of clustered task graphs onto multiprocessor architectures	34	2.79	2000
Evaluation of Loop Grouping Methods Based on Orthogonal Projection Spaces	9	0.59	2000
Optimal scheduling for UET-UCT grids into fixed number of processors	3	0.43	2000
Chain Grouping: A Method for Partitioning Loops onto Mesh-Connected Processor Arrays	9	0.58	2000
Dynamic dramatization of multimedia story presentations	11	2.70	1997
An attribute grammar approach to high-level automated hardware synthesis	8	0.63	1995
Systematic synthesis of parallel VLSI architectures from FP specifications and its application to scene matching	1	0.41	1992