F. Lombardi - Citegraph

Author Info

Name	Affiliation	Papers
F. LOMBARDI	Northeastern University, Boston, MA	27
Collaborators	Citations	PageRank
52	122	15.25
Referers	Referees	References
317	270	132

Search Limit

100317

Publications (27 rows)

Collaborators (52 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Low-Power Unsigned Divider and Square Root Circuit Designs using Adaptive Approximation	2	0.38	2019
A Deterministic Low-Complexity Approximate (Multiplier-Less) Technique for DCT Computation	0	0.34	2019
Two Bit Overlap: A Class of Double Error Correction One Step Majority Logic Decodable Codes.	0	0.34	2019
A High-Performance and Energy-Efficient FIR Adaptive Filter Using Approximate Distributed Arithmetic Circuits.	4	0.42	2019
Low-Power Approximate Unsigned Multipliers With Configurable Error Recovery.	7	0.49	2019
A Probabilistic Error Model and Framework for Approximate Booth Multipliers.	0	0.34	2018
Multiple Fault Detection in Nano Programmable Logic Arrays	0	0.34	2018
CCE - A Combined SRAM and Non Volatile Cache for Endurance of Next Generation Multilevel Non Volatile Memories in Embedded Systems.	0	0.34	2018
Design Exploration of Small Bit-Width Multipliers Using Approximate Logic Design (ALD) Tool.	2	0.40	2018
Partially universal modules for high performance logic circuit design	0	0.34	2017
Design of Approximate Radix-4 Booth Multipliers for Error-Tolerant Computing.	17	0.73	2017
Testing Reversible One-Dimensional QCA Arrays for Multiple F	0	0.34	2007
Error rate reduction in DNA self-assembly by non-constant monomer concentrations and profiling	3	0.39	2007
Tile-based QCA design using majority-like logic primitives	16	1.09	2005
Design of a QCA Memory with Parallel Read/Serial Write	9	1.11	2005
Tile-based design of a serial memory in QCA	7	1.03	2005
Evaluating the Data Integrity of Memory Systems by Configurable Markov Models	0	0.34	2005
Defect Characterization and Tolerance of QCA Sequential Devices and Circuits	13	1.68	2005
Error-Resilient Test Data Compression Using Tunstall Codes	5	0.51	2004
Reliability Modeling and Assurance of Clockless Wave Pipeline	1	0.36	2004
On The Yield of Compiler-Based eSRAMs	6	0.64	2004
Fault tolerant clockless wave pipeline design	1	0.36	2004
Evaluation of heuristic techniques for test vector ordering	3	0.44	2004
Compression of VLSI test data by arithmetic coding	3	0.42	2004
Testing of inter-word coupling faults in word-oriented SRAMs	1	0.35	2004
A Parallel Approach for Testing Multi-Port Static Random Access Memories	2	0.42	2001
Detection of Inter-Port Faults in Multi-Port Static RAMs	20	1.32	2000