Name
Affiliation
Papers
HAI LI
Nanjing Univ Aeronaut & Astronaut, Coll Mech & Elect Engn, Nanjing, Peoples R China
319
Collaborators
Citations 
PageRank 
569
2435
208.37
Referers 
Referees 
References 
4528
5612
2981
Search Limit
1001000
Title
Citations
PageRank
Year
Improving Gradient Regularization using Complex-Valued Neural Networks00.342021
BitSystolic: A 26.7 TOPS/W 2b~8b NPU With Configurable Data Flows for Edge Devices30.412021
Learning To Train Cnns On Faulty Reram-Based Manycore Accelerators10.352021
Heterogeneous Manycore Architectures Enabled by Processing-in-Memory for Deep Learning: From CNNs to GNNs: (ICCAD Special Session Paper)10.362021
AccuReD: High Accuracy Training of CNNs on ReRAM/GPU Heterogeneous 3D Architecture50.422021
MSSM: A Multiple-level Sparse Sharing Model for Efficient Multi-Task Learning10.372021
The Fifth International Workshop on Automation in Machine Learning00.342021
Privacy-Preserving Representation Learning on Graphs: A Mutual Information Perspective00.342021
Hermes: an efficient federated learning framework for heterogeneous mobile clients00.342021
FL-WBC: Enhancing Robustness against Model Poisoning Attacks in Federated Learning from a Client Perspective.00.342021
An analysis of technology licensing and parallel importation under different market structures00.342021
Soteria: Provable Defense against Privacy Leakage in Federated Learning from Representation Perspective00.342021
Line Art Correlation Matching Feature Transfer Network For Automatic Animation Colorization00.342021
Introduction to the Special Issue on the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS 2020)00.342020
PARC: A Processing-in-CAM Architecture for Genomic Long Read Pairwise Alignment using ReRAM20.342020
Leveraging 3D Vertical RRAM to Developing Neuromorphic Architecture for Pattern Classification00.342020
3D-ReG: A 3D ReRAM-based Heterogeneous Architecture for Training Deep Neural Networks20.372020
Introduction to the Special Issue on New Trends in Nanoelectronic Device, Circuit, and Architecture Design, Part 100.342020
Enhancing Generalization of Wafer Defect Detection by Data Discrepancy-aware Preprocessing and Contrast-varied Augmentation00.342020
PENNI: Pruned Kernel Sharing for Efficient CNN Inference00.342020
Resipe: Reram-Based Single-Spiking Processing-In-Memory Engine00.342020
Thread Batching for High-performance Energy-efficient GPU Memory Design.00.342019
Snooping Attacks on Deep Reinforcement Learning.00.342019
Feedback Learning for Improving the Robustness of Neural Networks.00.342019
SwiftNet: Using Graph Propagation as Meta-knowledge to Search Highly Representative Neural Architectures.00.342019
Multichannel Signal Detection Based on Wald Test in Subspace Interference and Gaussian Noise70.482019
RC-NVM: Dual-Addressing Non-Volatile Memory Architecture Supporting Both Row and Column Memory Accesses.30.412019
An Overview of In-memory Processing with Emerging Non-volatile Memory for Data-intensive Applications30.442019
MobiEye: An Efficient Cloud-based Video Detection System for Real-time Mobile Applications30.432019
High-Performance Tensor Decoder on GPUs for Wireless Camera Networks in IoT.00.342019
Exploiting Spin-Orbit Torque Devices as Reconfigurable Logic for Circuit Obfuscation.60.712019
Learning Efficient Sparse Structures In Speech Recognition10.352019
Differentiable Fine-grained Quantization for Deep Neural Network Compression.00.342018
Towards Leveraging the Information of Gradients in Optimization-based Adversarial Attack.00.342018
Modeling of biaxial magnetic tunneling junction for multi-level cell STT-RAM realization.00.342018
ATPP: A Pipeline for Automatic Tractography-Based Brain Parcellation.20.402017
Looking Ahead for Resistive Memory Technology: A broad perspective on ReRAM technology for future storage and computing.50.442017
The New Large-Scale RNNLM System Based on Distributed Neuron00.342017
A Compact Memristor-Based Dynamic Synapse for Spiking Neural Networks.30.432017
Ball-disk rotor gyroscope adaptive quick-start technique.00.342017
FlexLevel NAND Flash Storage System Design to Reduce LDPC Latency.10.372017
Hybrid spiking-based multi-layered self-learning neuromorphic system based on memristor crossbar arrays.00.342017
Technical program overview00.342017
Group Scissor: Scaling Neuromorphic Computing Design to Large Neural Networks.50.412017
Security of neuromorphic computing: thwarting learning attacks using memristor's obsolescence effect.40.432016
Harmonica: A Framework of Heterogeneous Computing Systems With Memristor-Based Neuromorphic Computing Accelerators.130.602016
Sliding Basket: An Adaptive Ecc Scheme For Runtime Write Failure Suppression Of Stt-Ram Cache10.352016
Heterogeneous systems with reconfigurable neuromorphic computing accelerators10.342016
The Applications of NVM Technology in Hardware Security.20.362016
Library-Based Placement and Routing in FPGAs with Support of Partial Reconfiguration.10.442016
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