A CMOS Current Steering Neurostimulation Array With Integrated DAC Calibration and Charge Balancing. | 2 | 0.40 | 2017 |
Hierarchical Address Event Routing for Reconfigurable Large-Scale Neuromorphic Systems. | 12 | 0.51 | 2017 |
Silicon-Integrated High-Density Electrocortical Interfaces. | 1 | 0.37 | 2017 |
A Bidirectional Neural Interface IC With Chopper Stabilized BioADC Array and Charge Balanced Stimulator. | 2 | 0.35 | 2016 |
A 16-channel wireless neural interfacing SoC with RF-powered energy-replenishing adiabatic stimulation. | 0 | 0.34 | 2015 |
A 5 μW/channel 9b-ENOB BioADC array for electrocortical recording | 0 | 0.34 | 2015 |
BFSK MICS direct-DCO transmitter with adaptive background frequency regulation. | 0 | 0.34 | 2012 |
Terminal set of min-max model predictive control with guaranteed ℒ2 performance | 0 | 0.34 | 2012 |
Ultra-High Input Impedance, Low Noise Integrated Amplifier for Noncontact Biopotential Sensing | 15 | 1.13 | 2011 |
Energy-efficient resonant BFSK MICS transmitter with fast-settling dual-loop adaptive frequency locking | 0 | 0.34 | 2011 |
Managing Componentware Development - Software Reuse and the V-Modell Process | 7 | 1.04 | 1999 |