Effective Post-Silicon Validation of System-on-Chips Using Quick Error Detection | 11 | 0.66 | 2014 |
Overcoming post-silicon validation challenges through quick error detection (QED) | 3 | 0.38 | 2013 |
Combinational Logic Design Using Six-Terminal NEM Relays | 15 | 1.10 | 2013 |
Quick detection of difficult bugs for effective post-silicon validation | 18 | 0.70 | 2012 |
Low-power fanout optimization using multi threshold voltages and multi channel lengths | 0 | 0.34 | 2009 |
Xquasher: a tool for efficient computation of multiple linear expressions | 4 | 0.42 | 2009 |
Charge Recycling in Power-Gated CMOS Circuits | 12 | 0.88 | 2008 |
Sizing and placement of charge recycling transistors in MTCMOS circuits | 1 | 0.37 | 2007 |
A Robust Power Gating Structure and Power Mode Transition Strategy for MTCMOS Design | 25 | 1.48 | 2007 |
Algebraic Methods for Optimizing Constant Multiplications in Linear Systems | 5 | 0.77 | 2007 |
Low-leakage SRAM Design with Dual V_t Transistors | 1 | 0.37 | 2006 |
Charge recycling in MTCMOS circuits: concept and analysis | 13 | 0.95 | 2006 |
Low-power fanout optimization using MTCMOS and multi-Vt techniques | 6 | 0.54 | 2006 |
Optimizing high speed arithmetic circuits using three-term extraction | 5 | 0.55 | 2006 |
Reducing the Sub-threshold and Gate-tunneling Leakage of SRAM Cells using Dual-Vt and Dual-Tox Assignment | 11 | 0.86 | 2006 |
Reducing hardware complexity of linear DSP systems by iteratively eliminating two-term common subexpressions | 14 | 1.04 | 2005 |
Low-power fanout optimization using multiple threshold voltage inverters | 3 | 0.41 | 2005 |
Analysis and optimization of static power considering transition dependency of leakage current in VLSI circuits | 1 | 0.37 | 2005 |
A way memoization technique for reducing power consumption of caches in application specific integrated processors | 8 | 0.55 | 2005 |
A cache-defect-aware code placement algorithm for improving the performance of processors | 10 | 0.70 | 2005 |
An effective power mode transition technique in MTCMOS circuits | 26 | 1.79 | 2005 |
Standby And Active Leakage Current Control And Minimization In Cmos Vlsi Circuits | 65 | 3.55 | 2005 |
Energy Efficient Hardware Synthesis of Polynomial Expressions | 6 | 0.54 | 2005 |
A non-uniform cache architecture for low power system design | 13 | 0.65 | 2005 |
Transition reduction in memory buses using sector-based encoding techniques | 6 | 0.49 | 2004 |
Common Subexpression Elimination Involving Multiple Variables for Linear DSP Synthesis | 7 | 0.66 | 2004 |
Leakage current reduction in CMOS VLSI circuits by input vector control | 67 | 3.93 | 2004 |
Factoring and eliminating common subexpressions in polynomial expressions | 17 | 0.97 | 2004 |
Leakage current reduction in sequential circuits by modifying the scan chains | 2 | 0.62 | 2003 |
Event-driven observability enhanced coverage analysis of C programs for functional validation | 2 | 0.40 | 2003 |
Precomputation-based Guarding for Dynamic and Leakage Power Reduction | 9 | 1.07 | 2003 |
BEAM: bus encoding based on instruction-set-aware memories | 0 | 0.34 | 2003 |
Reducing transitions on memory buses using sector-based encoding technique | 3 | 0.45 | 2002 |
Runtime mechanisms for leakage current reduction in CMOS VLSI circuits | 0 | 0.34 | 2002 |
A Class of Irredundant Encoding Techniques for Reducing Bus Power | 3 | 0.43 | 2002 |
Runtime mechanisms for leakage current reduction in CMOS VLSI circuits1,2 | 24 | 2.28 | 2002 |
ALBORZ: Address Level Bus Power Optimization | 5 | 0.52 | 2002 |
Binary time-frame expansion | 4 | 0.47 | 2002 |
Functional vector generation for HDL models using linearprogramming and Boolean satisfiability | 11 | 1.10 | 2001 |
Occom - Efficient Computation Of Observability-Based Code Coverage Metrics For Functional Verification | 3 | 0.51 | 2001 |
Observability enhanced coverage analysis of C programs for functional validation | 0 | 0.34 | 2001 |
Solving covering problems using LPR-based lower bounds | 6 | 0.92 | 2000 |
Simulation vector generation from HDL descriptions for observability-enhanced statement coverage | 45 | 3.77 | 1999 |
Functional vector generation for HDL models using linear programming and 3-satisfiability | 67 | 4.18 | 1998 |