Michel S. Nakhla - Citegraph

Author Info

Name	Affiliation	Papers
MICHEL S. NAKHLA	Carleton Univ, Dept Elect, Ottawa, ON K1S 5B6, Canada	18
Collaborators	Citations	PageRank
22	42	16.55
Referers	Referees	References
97	124	82

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100124

Publications (18 rows)

Collaborators (22 rows)

Referers (97 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Dynamic GPU Parallel Sparse LU Factorization for Fast Circuit Simulation.	2	0.43	2018
Addressing Partitioning Issues in Parallel Circuit Simulation.	0	0.34	2014
Efficient Parallel Scheduler For Circuit Simulation Exploiting Binary Link Formulations	0	0.34	2013
Structural Characterization and Efficient Implementation Techniques for $A$-Stable High-Order Integration Methods	2	0.38	2012
Comparison study of performance of parallel steady state solver on different computer architectures	0	0.34	2010
Passivity Compensation Algorithm for Method-of-Characteristics-Based Multiconductor Transmission Line Interconnect Macromodels	1	0.39	2009
Fast passivity verification and enforcement via reciprocal systems for interconnects with large order macromodels	6	0.77	2007
On passivity enforcement for macromodels of S-parameter based tabulated subnetworks	0	0.34	2005
Global passivity enforcement algorithm for macromodels of interconnect subnetworks characterized by tabulated data	17	1.36	2005
Accurate and closed-form SPICE compatible passive macromodels for distributed interconnects with frequency dependent parameters	0	0.34	2005
Computing large-change sensitivity of periodic responses of nonlinear circuits using reduction techniques	1	0.37	2004
Fast Sensitivity Analysis Of Transmission Line Networks	0	0.34	2004
Model-reduction of nonlinear circuits using Krylov-space techniques	7	0.89	1999
Multi-Point Multi-Port Reduction Of High-Speed Distributed Interconnects Using Krylov-Space Techniques	0	0.34	1999
Efficient simulation of on-chip RF components using model-reduction techniques	1	0.35	1999
A High-Order Temporal Neural Network For Word Recognition	0	0.34	1995
Parallel Time Domain Analysis and Optimization of High-Speed VLSI Interconnects	0	0.34	1993
Simulating 3-D retarded interconnect models using complex frequency hopping (CFH)	5	8.56	1993

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