Wonchan Kim - Citegraph

Author Info

Name	Affiliation	Papers
WONCHAN KIM	Seoul Natl Univ, Sch Elect Engn, Seoul, South Korea	6
Collaborators	Citations	PageRank
27	84	15.43
Referers	Referees	References
268	33	10

Search Limit

100268

Publications (6 rows)

Collaborators (27 rows)

Referers (100 rows)

Referees (33 rows)

Title	Citations	PageRank	Year
A 2.8Gb/s All-Digital CDR with a 10b Monotonic DCO.	8	1.13	2007
Full-CMOS 2-GHz WCDMA direct conversion transmitter and receiver	13	2.16	2003
A fully integrated CMOS frequency synthesizer with charge-averaging charge pump and dual-path loop filter for PCS- and cellular-CDMA wireless systems	20	4.22	2002
A 5-Gb/s 0.25-μm CMOS jitter-tolerant variable-interval oversampling clock/data recovery circuit	11	2.43	2002
A dual-loop delay-locked loop using multiple voltage-controlled delay lines	30	4.98	2001
A semi-digital delay locked loop for clock skew minimization	2	0.51	1999

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