50Gb/s Hybrid Integrated Si-Photonic Optical Link in 16nm FinFET | 0 | 0.34 | 2020 |
Semi-Supervised Deep Learning for Abnormality Classification in Retinal Images. | 0 | 0.34 | 2018 |
High-resolution medical image synthesis using progressively grown generative adversarial networks. | 2 | 0.36 | 2018 |
DeepNeuro: an open-source deep learning toolbox for neuroimaging. | 0 | 0.34 | 2018 |
Deep feature transfer between localization and segmentation tasks. | 0 | 0.34 | 2018 |
Sequential 3D U-Nets for Biologically-Informed Brain Tumor Segmentation. | 0 | 0.34 | 2017 |
Institutionally Distributed Deep Learning Networks. | 0 | 0.34 | 2017 |
Hierarchical Clustering of Tractography Streamlines Based on Anatomical Similarity. | 4 | 0.42 | 2016 |
F2: VLSI power-management techniques: Principles and applications. | 0 | 0.34 | 2013 |
Session 19 overview: 20+ Gb/s wireline transceivers and injection-locked clocking: Wireline subcommittee. | 0 | 0.34 | 2012 |
10-40 Gb/s I/O design for data communications. | 0 | 0.34 | 2012 |
Ultra-low voltage VLSIs for energy efficient systems. | 0 | 0.34 | 2011 |
Low-skew clock distribution using zero-phase-clock-buffer DLLs | 2 | 0.39 | 2010 |
Session 20 - Advanced wireline techniques. | 0 | 0.34 | 2008 |
Replica compensated linear regulators for supply-regulated phase-locked loops | 48 | 5.30 | 2006 |