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KEJIE HUANG
Author Info
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Name
Affiliation
Papers
KEJIE HUANG
Department of Engineering Product Design, Singapore University of Technology and Design, Singapore 138682.|c|
5
Collaborators
Citations
PageRank
9
48
3.08
Referers
Referees
References
131
190
54
Search Limit
100
190
Publications (5 rows)
Collaborators (9 rows)
Referers (100 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
High-Density and High-Reliability Nonvolatile Field-Programmable Gate Array With Stacked 1D2R RRAM Array
5
0.47
2016
Racetrack Memory-Based Nonvolatile Storage Elements for Multicontext FPGAs.
5
0.42
2016
A Low Power and High Sensing Margin Non-Volatile Full Adder Using Racetrack Memory
8
0.49
2015
A Low Active Leakage and High Reliability Phase Change Memory (PCM) Based Non-Volatile FPGA Storage Element
29
1.34
2014
A Low Power Localized 2t1r Stt-Mram Array With Pipelined Quad-Phase Saving Scheme For Zero Sleep Power Systems
1
0.35
2014
1