Tyler Sorensen - Citegraph

Author Info

Name	Affiliation	Papers
TYLER SORENSEN	University of Utah, Salt Lake City, UT, USA	21
Collaborators	Citations	PageRank
35	109	9.42
Referers	Referees	References
222	434	250

Search Limit

100434

Publications (21 rows)

Collaborators (35 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Specifying and testing GPU workgroup progress models	0	0.34	2021
GraphAttack: Optimizing Data Supply for Graph Applications on In-Order Multicore Architectures	1	0.35	2021
The semantics of shared memory in Intel CPU/FPGA systems	1	0.35	2021
Slow and Steady: Measuring and Tuning Multicore Interference	2	0.37	2020
A simulator and compiler framework for agile hardware-software co-design evaluation and exploration	1	0.35	2020
MosaicSim: A Lightweight, Modular Simulator for Heterogeneous Systems	0	0.34	2020
Foundations of empirical memory consistency testing	0	0.34	2020
Performance Evaluation of OpenCL Standard Support (and Beyond)	0	0.34	2019
GPU Schedulers: How Fair Is Fair Enough?.	0	0.34	2018
Do Your Cores Play Nicely? A Portable Framework for Multi-core Interference Tuning and Analysis.	0	0.34	2018
Cooperative Kernels: GPU Multitasking for Blocking Algorithms (Extended Version).	1	0.35	2017
Automatically comparing memory consistency models.	24	0.70	2017
Cooperative kernels: GPU multitasking for blocking algorithms	3	0.38	2017
Forward Progress on GPU Concurrency (Invited Talk).	0	0.34	2017
The Semantics of Transactions and Weak Memory in x86, Power, ARM, and C++.	3	0.38	2017
The Hitchhiker's Guide to Cross-Platform OpenCL Application Development.	2	0.38	2016
Exposing errors related to weak memory in GPU applications.	11	0.51	2016
Portable inter-workgroup barrier synchronisation for GPUs.	5	0.43	2016
I compute, therefore I am (buggy): methodic doubt meets multiprocessors.	0	0.34	2015
GPU Concurrency: Weak Behaviours and Programming Assumptions	48	1.62	2015
Towards shared memory consistency models for GPUs	7	0.54	2013