A 3-6-GHz Highly Linear I-Channel Receiver With Over +3.0-dBm In-Band P1dB and 200-MHz Baseband Bandwidth Suitable for 5G Wireless and Cognitive Radio Applications. | 0 | 0.34 | 2019 |
A 43-mW MASH 2-2 CT ΣΔ Modulator Attaining 74.4/75.8/76.8 dB of SNDR/SNR/DR and 50 MHz of BW in 40-nm CMOS. | 0 | 0.34 | 2017 |
Design Techniques to Improve Blocker Tolerance of Continuous-Time ΔΣ ADCs. | 0 | 0.34 | 2015 |
Low-Voltage Temperature-Independent Current Reference with no External Components | 2 | 0.55 | 2007 |
A Rail-To-Rail Amplifier Input Stage With +/- 0.35%Gm Fluctuation | 1 | 0.45 | 2005 |