Author Info
Name
Affiliation
Papers
IGOR KELLER
Cadence Design Syst., Inc., San Jose, CA|c|
1
Collaborators
Citations 
PageRank 
2
9
0.63
Referers 
Referees 
References 
28
38
11
Title
Citations
PageRank
Year
Challenges in gate level modeling for delay and SI at 65nm and below90.632008