An efficient routing method for pseudo-exhaustive built-in self-testing of high-speed interconnects | 0 | 0.34 | 2007 |
Crosstalk Test Pattern Generation for Dynamic Programmable Logic Arrays | 2 | 0.37 | 2006 |
A built-in self-testing method for embedded multiport memory arrays | 1 | 0.37 | 2005 |
Scan chain fault identification using weight-based codes for SoC circuits | 5 | 0.52 | 2004 |
An efficient BIST method for non-traditional faults of embedded memory arrays | 5 | 0.45 | 2003 |
Charge sharing fault detection for CMOS domino logic circuits | 4 | 0.96 | 1999 |
Probabilistic modeling and fault analysis in sequential logic using computer simulation | 6 | 0.79 | 1990 |