Jae Wook Lee - Citegraph

Author Info

Name	Affiliation	Papers
JAE WOOK LEE	The University of Texas at Austin, Austin, TX, USA	22
Collaborators	Citations	PageRank
121	33	8.37
Referers	Referees	References
103	447	172

Search Limit

100447

Publications (22 rows)

Collaborators (100 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
A Survey on Security and Privacy in Blockchain-based Central Bank Digital Currencies.	0	0.34	2021
CG-E2S2: Consistency-guaranteed and energy-efficient sleep scheduling algorithm with data aggregation for IoT.	2	0.36	2019
Trajectory-Aware Edge Node Clustering in Vehicular Edge Clouds	0	0.34	2019
Spatial and Temporal Computation Offloading Decision Algorithm in Edge Cloud-Enabled Heterogeneous Networks.	2	0.36	2018
Joint Optimization of Channel Selection and Frame Scheduling for Coexistence of LTE and WLAN.	1	0.41	2018
An Empirical Study on Modeling and Prediction of Bitcoin Prices With Bayesian Neural Networks Based on Blockchain Information.	5	0.49	2018
Information-Based Boundary Equilibrium Generative Adversarial Networks with Interpretable Representation Learning.	0	0.34	2018
Energy-efficient proactive edge caching with sleep scheduling for green networks	0	0.34	2018
MALM: Mobility-Aware Location Management Scheme in Femto/Macrocell Networks.	2	0.37	2017
Active learning using transductive sparse Bayesian regression.	1	0.36	2016
EVpedia: a community web portal for extracellular vesicles research.	1	0.38	2015
An Analytical Approach to Thermal Design and Optimization With a Temperature-Dependent Power Model	1	0.48	2015
Indirect method for random jitter measurement on SoCs using critical path characterization	0	0.34	2012
Off-Chip Skew Measurement and Compensation Module (SMCM) Design for Built-Off Test Chip	0	0.34	2011
At-speed Test of High-Speed DUT Using Built-Off Test Interface	0	0.34	2010
A hybrid approach of goal programming for weapon systems selection	9	0.54	2010
A novel characterization technique for high speed I/O mixed signal circuit components using random jitter injection	0	0.34	2010
A delay measurement method using a shrinking clock signal	0	0.34	2010
Low-Complexity Off-Chip Skew Measurement and Compensation Module (SMCM) Design for Built-Off Test Chip	0	0.34	2009
A Random Jitter RMS Estimation Technique for BIST Applications	1	0.36	2009
An evolutionary keystroke authentication based on ellipsoidal hypothesis space	8	0.56	2007
Lightweight Specification-based Testing of Memory Cards: A Case Study	0	0.34	2005