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YANAN SUN
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Name
Affiliation
Papers
YANAN SUN
Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China
8
Collaborators
Citations
PageRank
27
2
2.76
Referers
Referees
References
15
48
13
Publications (8 rows)
Collaborators (27 rows)
Referers (15 rows)
Referees (48 rows)
Title
Citations
PageRank
Year
An Ultra-Low Leakage Bitcell Structure with the Feedforward Self-Suppression Scheme for Near-Threshold SRAM
0
0.34
2021
Design Of Ternary Logic-In-Memory Based On Memristive Dual-Crossbars
0
0.34
2021
Unary Coding and Variation-Aware Optimal Mapping Scheme for Reliable ReRAM-Based Neuromorphic Computing
1
0.36
2021
An Area-Efficient Scannable In Situ Timing Error Detection Technique Featuring Low Test Overhead for Resilient Circuits
0
0.34
2021
An Energy-Efficient Logic Cell Library Design Methodology with Fine Granularity of Driving Strength for Near- and Sub-Threshold Digital Circuits
0
0.34
2021
ITT-RNA: Imperfection Tolerable Training for RRAM-Crossbar-Based Deep Neural-Network Accelerator
1
0.37
2021
Monolithic 3D Carbon Nanotube Memory for Enhanced Yield and Integration Density
0
0.34
2020
A 0.33 V 2.5 μW cross-point data-aware write structure, read-half-select disturb-free sub-threshold SRAM in 130 nm CMOS.
0
0.34
2017
1