A 16mm 2 106.1 GOPS/W Heterogeneous RISC-V Multi-Core Multi-Accelerator SoC in Low-Power 22nm FinFET | 2 | 0.41 | 2021 |
Accessible, FPGA Resource-Optimized Simulation of Multiclock Systems in FireSim | 1 | 0.34 | 2021 |
COBRA: A Framework for Evaluating Compositions of Hardware Branch Predictors | 0 | 0.34 | 2021 |
Vertically Integrated Computing Labs Using Open-Source Hardware Generators and Cloud-Hosted FPGAs | 0 | 0.34 | 2021 |
FireMarshal: Making HW/SW Co-Design Reproducible and Reliable | 1 | 0.34 | 2021 |
Invited: Chipyard - An Integrated Soc Research And Implementation Environment | 0 | 0.34 | 2020 |
FirePerf: FPGA-Accelerated Full-System Hardware/Software Performance Profiling and Co-Design | 1 | 0.34 | 2020 |
Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs | 7 | 0.47 | 2020 |
Co-Design of Deep Neural Nets and Neural Net Accelerators for Embedded Vision Applications | 0 | 0.34 | 2019 |
FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. | 4 | 0.39 | 2018 |