Weaving Schematics and Code: Interactive Visual Editing for Hardware Description Languages | 0 | 0.34 | 2021 |
Polymorphic Blocks: Unifying High-level Specification and Low-level Control for Circuit Board Design | 1 | 0.36 | 2020 |
A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance. | 0 | 0.34 | 2019 |
A Generated Multirate Signal Analysis RISC-V SoC in 16nm FinFET | 1 | 0.43 | 2018 |
Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations. | 4 | 0.41 | 2017 |
Cyclist: Accelerating hardware development. | 0 | 0.34 | 2017 |
Turning coders into makers: the promise of embedded design generation | 0 | 0.34 | 2017 |