a kakarudas - Citegraph

Author Info

Name	Affiliation	Papers
A KAKARUDAS	Univ Patras, VLSI Design Lab, Dept Elect & Comp Engn, Rion 26500, Greece	1
Collaborators	Citations	PageRank
4	7	0.56
Referers	Referees	References
19	3	1

Publications (1 rows)

Collaborators (4 rows)

Referers (19 rows)

Referees (3 rows)

Title	Citations	PageRank	Year
Memory Hierarchy Layer Assignment For Data Re-Use Exploitation In Multimedia Algorithms Realized On Predefined Processor Architectures	7	0.56	2001

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