Title | ||
---|---|---|
Design And Fpga Implementation Of Digital Pulse Compression For Chirp Radar Based On Cordic |
Abstract | ||
---|---|---|
The paper presents a full digitized approach for the pulse compression implementation in chirp radars. The emphasis is to cancel the quadratic phase term of the echo using a coordinate rotation digital computer (CORDIC). This approach has been implemented on a field programmable gates array (FPGA) and the compressed output peak is 100 dB larger than the noise. |
Year | DOI | Venue |
---|---|---|
2009 | 10.1587/elex.6.780 | IEICE ELECTRONICS EXPRESS |
Keywords | Field | DocType |
pulse compression, chirp, linear FM, CORDIC | Pulse compression,Computer science,Digital computer,Field-programmable gate array,Quadratic equation,Electronic engineering,CORDIC,Chirp,Computer hardware,Rotation (mathematics),Chirp radar | Journal |
Volume | Issue | ISSN |
6 | 11 | 1349-2543 |
Citations | PageRank | References |
4 | 1.82 | 2 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Zhisheng Yan | 1 | 68 | 9.18 |
Biyang Wen | 2 | 56 | 15.79 |
Caijun Wang | 3 | 4 | 3.51 |
Chong Zhang | 4 | 58 | 13.85 |